The ADS8686S features a communication self-test mode and a cyclic redundancy check (CRC) mode. These features help diagnose any issues with the digital interface between the host and the device.

The communication self test can be enabled by programming the communication self-test channel in the channel register (see the Section 7.6 section). When enabled, the device forces the conversion result register to a known fixed output. When the conversion code is read, code 0xAAAA is output as the conversion code of ADC A, and code 0x5555 is output as the conversion code of ADC B. This feature can be accessed in the software mode of operation and is not supported in the hardware mode of operation.

The ADS8686S supports a CRC checksum mode to improve interface robustness by detecting errors in data. The CRC feature is available in both software (serial, byte, and parallel) mode and hardware (serial only) mode. The CRC feature is not available in hardware parallel or hardware byte modes. The CRC result is stored in the status register. Enabling the CRC feature enables the status register and vice versa.

In hardware mode, set the CRCEN pin to logic high when the ADS8686S is released from a full reset to enable the CRC feature. The logic level of the CRCEN pin is latched when the RESET pin is released. A full reset is required to exit the function and setup an alternative configuration. With CRC enabled, the content of the status register is appended to the conversion result (see the STATUS register in the Section 7.6 section for details regarding the CRC data structure).

In software mode, the CRC function is enabled by setting either the CRCEN bit or the STATUSEN bit in the configuration register to 1.

If the CRC function is enabled, a CRC is calculated on the conversion results for channel AIN_nA and channel AIN_nB. The CRC is calculated and transferred on the serial, byte, or parallel interface after the conversion results are transmitted, depending on the configuration of the device. The hamming distance varies in relation to the number of bits in the conversion result. For conversions with less than or equal to 119 bits, the hamming distance is 4. For more than 119 bits, the hamming distance is 1 (that is, 1-bit errors are always detected).

The following is a pseudocode description of how the CRC is implemented in the ADS8686S:

crc = 8’b0;
i = 0;
x = number of conversion channel pairs;
for (i=0, i<x, i++) begin
crc1 = crc_out(An,Crc);
crc = crc_out(Bn,Crc1);
i = i +1;
end

Where the function crc_out(data, crc) is:

crc_out[0] = data[14] ^ data[12] ^ data[8] ^ data[7] ^ data[6] ^ data[0] ^ crc[0] ^ crc[4] ^ crc[6];
crc_out[1] = data[15] ^ data[14] ^ data[13] ^ data[12] ^ data[9] ^ data[6] ^ data[1] ^ data[0] ^ crc[1] ^ crc[4] ^ crc[5] ^ crc[6] ^ crc[7];
crc_out[2] = data[15] ^ data[13] ^ data[12] ^ data[10] ^ data[8] ^ data[6] ^ data[2] ^ data[1] ^ data[0] ^ crc[0] ^ crc[2] ^ crc[4] ^ crc[5] ^ crc[7];
crc_out[3] = data[14] ^ data[13] ^ data[11] ^ data[9] ^ data[7] ^ data[3] ^ data[2] ^ data[1] ^ crc[1] ^ crc[3] ^ crc[5] ^ crc[6];
crc_out[4] = data[15] ^ data[14] ^ data[12] ^ data[10] ^ data[8] ^ data[4] ^ data[3] ^ data[2] ^ crc[0] ^ crc[2] ^ crc[4] ^ crc[6] ^ crc[7];
crc_out[5] = data[15] ^ data[13] ^ data[11] ^ data[9] ^ data[5] ^ data[4] ^ data[3] ^ crc[1] ^ crc[3] ^ crc[5] ^ crc[7];
crc_out[6] = data[14] ^ data[12] ^ data[10] ^ data[6] ^ data[5] ^ data[4] ^ crc[2] ^ crc[4] ^ crc[6];
crc_out[7] = data[15] ^ data[13] ^ data[11] ^ data[7] ^ data[6] ^ data[5] ^ crc[3] ^ crc[5] ^ crc[7];

The initial CRC word used by the ADS8686S is an 8-bit word equal to zero. The XOR operation described in the preceding code is executed to calculate each bit of the CRC word for the conversion result, An. This CRC word (crc1) is then used as the starting point for calculating the CRC word (crc) for the conversion result, Bn. The process repeats cyclically for each channel pair converted.

Depending on the mode of operation of the ADS8686S, the status register value is appended to the conversion data and read out through an extra read command over the serial, byte, or parallel interface. The XOR calculation can be repeated, as described in the preceding code for the received conversion results to check whether both CRC words match. Figure 7-22 describes how the CRC word is appended to the data for each mode of operation.

Figure 7-22 CRC Readback for All Modes