SBAS813 June 2018 ADS8688AT
PRODUCTION DATA.
The device has an active-high ALARM output on pin 35. The ALARM signal is synchronous and changes its state on the 16th falling edge of the SCLK signal. A high level on ALARM indicates that the alarm flag has tripped on one or more channels of the device. This pin can be wired to interrupt the host input. When an ALARM interrupt is received, the alarm flag registers are read to determine which channels have an alarm. The device features independently programmable alarms for each channel. There are two alarms per channel (a low and a high alarm) and each alarm threshold has a separate hysteresis setting.
The ADS8688AT sets a high alarm when the digital output for a particular channel exceeds the high alarm upper limit [high alarm threshold (T) + hysteresis (H)]. The alarm resets when the digital output for the channel is less than or equal to the high alarm lower limit (high alarm T – H – 2). Figure 82 shows this function.
Similarly, the lower alarm is triggered when the digital output for a particular channel falls below the low alarm lower limit (low alarm threshold T – H – 1). The alarm resets when the digital output for the channel is greater than or equal to the low alarm higher limit (low alarm T + H + 1). Figure 83 shows this function.
Figure 84 depicts a functional block diagram for a single-channel alarm. There are two flags for each high and low alarm: active alarm flag and tripped alarm flag; see the alarm flag registers for more details. The active alarm flag is triggered when an alarm condition is encountered for a particular channel; the active alarm flag resets when the alarm shuts off. A tripped alarm flag sets an alarm condition in the same manner as for an active alarm flag. However, the tripped alarm flag remains latched and resets only when the appropriate alarm flag register is read.