SBAS813 June 2018 ADS8688AT
PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
fS | Sampling frequency (fCLK = max) | 500 | kSPS | |||
tS | ADC cycle time period
(fCLK = max) |
2 | µs | |||
fSCLK | Serial clock frequency (fS = max) | 17 | MHz | |||
tSCLK | Serial clock time period
(fS = max) |
59 | ns | |||
tCONV | Conversion time | 850 | ns | |||
tDZ_CSDO | Delay time: CS falling to data enable | 10 | ns | |||
tD_CKCS | Delay time: last SCLK falling to CS rising | 10 | ns | |||
tDZ_CSDO | Delay time: CS rising to SDO going to 3-state | 10 | ns |