SBAS777B December 2016 – March 2021
PRODUCTION DATA
The device features an active-low RST pin that is an asynchronous digital input. In order to enter a RESET state, the RST pin must be pulled low and kept low for the twl_RST duration (as specified in the Section 6.7 table).
The device features two different types of reset functions: an application reset or a power-on reset (POR). The functionality of the RST pin is determined by the state of the RSTn_APP bit in the RST_PWRCTL_REG register.
In order to exit any of the RESET states, the RST pin must be pulled high with CONVST/CS and SCLK held low. After a delay of tD_RST_POR or tD_RST_APP (see the Timing Requirements: Asynchronous Reset table), the device enters ACQ state and the RVS pin goes high.
To operate the device in any of the other two states (ACQ or CONV), the RST pin must be held high. With the RST pin held high, transitions on the CONVST/CS pin determine the functional state of the device. A typical conversion cycle is illustrated in Figure 6-1.