SBAS614C May   2013  – March 2019 ADS8866

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      No Separate LDO Required for the ADC Supply
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements: 3-Wire Operation
    7. 7.7 Timing Requirements: 4-Wire Operation
    8. 7.8 Timing Requirements: Daisy-Chain
    9. 7.9 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Equivalent Circuits
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Analog Input
      2. 9.3.2 Reference
      3. 9.3.3 Clock
      4. 9.3.4 ADC Transfer Function
    4. 9.4 Device Functional Modes
      1. 9.4.1 CS Mode
        1. 9.4.1.1 3-Wire CS Mode
        2. 9.4.1.2 4-Wire CS Mode
      2. 9.4.2 Daisy-Chain Mode
        1. 9.4.2.1 Daisy-Chain Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 ADC Reference Driver
      2. 10.1.2 ADC Input Driver
        1. 10.1.2.1 Input Amplifier Selection
        2. 10.1.2.2 Charge-Kickback Filter
    2. 10.2 Typical Applications
      1. 10.2.1 DAQ Circuit for a 10-µs, Full-Scale Step Response
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
      2. 10.2.2 DAQ Circuit for Lowest Distortion and Noise Performance at 100 kSPS
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
      3. 10.2.3 Ultralow-Power DAQ Circuit at 10 kSPS
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
  11. 11Power Supply Recommendations
    1. 11.1 Power-Supply Decoupling
    2. 11.2 Power Saving
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.9 Typical Characteristics

at TA = 25°C, AVDD = 3 V, DVDD = 3 V, VREF = 5 V, and fSAMPLE = 100 kSPS (unless otherwise noted)
ADS8866 C001_SBAS572.png
Figure 4. Typical INL (VREF = 2.5 V)
ADS8866 C003_SBAS572.png
Figure 6. Typical INL (VREF = 5 V)
ADS8866 C005_SBAS572.png
Figure 8. INL vs Temperature
ADS8866 C007_SBAS572.png
Figure 10. INL vs Reference Voltage
ADS8866 C009_SBAS572.png
Figure 12. DC Input Histogram (VREF = 2.5 V)
ADS8866 C001_SBAS614.png
Figure 14. Typical FFT (VREF = 2.5 V)
ADS8866 C013_SBAS572.png
Figure 16. SNR vs Reference Voltage
ADS8866 C015_SBAS572.png
Figure 18. ENOB vs Reference Voltage
ADS8866 C017_SBAS572.png
Figure 20. SFDR vs Reference Voltage
ADS8866 C019_SBAS572.png
Figure 22. SINAD vs Temperature
ADS8866 C021_SBAS572.png
Figure 24. THD vs Temperature
ADS8866 C005_SBAS614.png
Figure 26. Supply Current vs Temperature
ADS8866 C003_SBAS614.png
Figure 28. Supply Current vs Throughput
ADS8866 C032_SBAS547.png
Figure 30. Power-Down Current vs Temperature
ADS8866 C034_SBAS572.png
Figure 32. Gain Error vs Temperature
ADS8866 C008_SBAS569.png
Figure 34. Typical Distribution of Offset Error
ADS8866 C010_SBAS569.png
Figure 36. Typical Distribution of Integral
Nonlinearity (Minimum and Maximum)
ADS8866 C002_SBAS572.png
Figure 5. Typical DNL (VREF = 2.5 V)
ADS8866 C004_SBAS572.png
Figure 7. Typical DNL (VREF = 5 V)
ADS8866 C006_SBAS572.png
Figure 9. DNL vs Temperature
ADS8866 C008_SBAS572.png
Figure 11. DNL vs Reference Voltage
ADS8866 C010_SBAS572.png
Figure 13. DC Input Histogram (VREF = 5 V)
ADS8866 C002_SBAS614.png
Figure 15. Typical FFT (VREF = 5 V)
ADS8866 C014_SBAS572.png
Figure 17. SINAD vs Reference Voltage
ADS8866 C016_SBAS572.png
Figure 19. THD vs Reference Voltage
ADS8866 C018_SBAS572.png
Figure 21. SNR vs Temperature
ADS8866 C020_SBAS572.png
Figure 23. ENOB vs Temperature
ADS8866 C022_SBAS572.png
Figure 25. SFDR vs Temperature
ADS8866 C006_SBAS614.png
Figure 27. Power Consumption vs Temperature
ADS8866 C004_SBAS614.png
Figure 29. Power Consumption vs Throughput
ADS8866 C033_SBAS572.png
Figure 31. Offset vs Temperature
ADS8866 C007_SBAS569.png
Figure 33. Typical Distribution of Gain Error
ADS8866 C009_SBAS569.png
Figure 35. Typical Distribution of Differential Nonlinearity (Minimum and Maximum)