ADS922x Dual, Simultaneous-Sampling, 16-Bit, 20MSPS SAR ADCs With Fully Differential ADC Input Driver

1 Features

High-speed sampling rate: 20MSPS/ch
- ADS9229 (advance information): 20MSPS/ch, 187mW/ch
- ADS9228 (preview): 10MSPS/ch, 146mW/ch
- ADS9227: 5MSPS/ch, 95mW/ch
2-channel, simultaneous sampling
Feature integration:
- Integrated ADC driver
- Integrated precision reference
- Common-mode voltage output buffer
High-performance
- 16-bit no missing codes
- INL: ±0.3LSB, DNL: ±0.3LSB
- SNR: 93.9dB
Wide input bandwidth:
- ADS9229: 135MHz (–3dB)
- ADS9228: 90MHz (–3dB)
- ADS9227: 45MHz (–3dB)
Serial LVDS interface:
- SDR and DDR output modes
- Synchronous clock and data output
Extended operating range: –40°C to 125°C

2 Applications

3 Description

The ADS922x is a family of 16-bit, high-speed, dual-channel, simultaneous-sampling, analog-to-digital converter (ADC) with an integrated driver for the ADC inputs. The integrated ADC driver simplifies the signal chain, reduces power consumption for precision applications, and supports high-frequency signals beyond 1MHz. By not requiring an external decoupling capacitor, the integrated ADC reference buffer is optimized for wide bandwidth applications.

The ADS922x uses a serial LVDS (SLVDS) data interface that enables high-speed digital interface while minimizing digital switching noise. Read the dual-channel ADC data using separate SLVDS outputs per ADC channel or one SLVDS output for both ADC channels.

Package Information

PART NUMBER	PACKAGE⁽¹⁾	PACKAGE SIZE⁽²⁾
ADS9227	RHA (VQFN, 40)	6mm × 6mm
ADS9228⁽³⁾
ADS9229⁽⁴⁾

(1) For more information, see the Mechanical, Packaging, and Orderable Information.

(2) The package size (length × width) is a nominal value and includes pins, where applicable.

(3) Preview device (not Production Data).

(4) Advance Information device (not Production Data).

Device Block Diagram

4 Pin Configuration and Functions

Figure 4-1 RHA Package,6mm × 6mm, 40-Pin VQFN(Top View)

Pin Functions

PIN		TYPE⁽¹⁾	DESCRIPTION
NAME	NO.	TYPE⁽¹⁾	DESCRIPTION
AINAM	4	I	Negative analog input for ADC A.
AINAP	3	I	Positive analog input for ADC A.
AINBM	8	I	Negative analog input for ADC B.
AINBP	7	I	Positive analog input for ADC B.
AVDD_5V	1, 10	P	5V analog power-supply pin.
CS	17	I	Chip-select input pin for the configuration interface; active low.
DCLKM	23	O	Negative differential data clock output. Connect a 100Ω resistor between DCLKP and DCLKM close to the receiver.
DCLKP	24	O	Positive differential data clock output. Connect a 100Ω resistor between DCLKP and DCLKM close to the receiver.
DOUTAM	27	O	Negative differential data output. Connect a 100Ω resistor between DOUTAP and DOUTAM close to the receiver. Transmits ADC A data in 2-lane mode. Transmits ADC A and ADC B data in 1-lane mode.
DOUTAP	28	O	Positive differential data output corresponding to ADC A. Connect a 100Ω resistor between DOUTAP and DOUTAM close to the receiver. Transmits ADC A data in 2-lane mode. Transmits ADC A and ADC B data in 1-lane mode.
DOUTBM	25	O	Negative differential data output corresponding to ADC B in 2-lane mode. Connect a 100Ω resistor between DOUTBP and DOUTBM close to the receiver. Unused in 1-lane mode.
DOUTBP	26	O	Positive differential data output corresponding to ADC B in 2-lane mode. Connect a 100Ω resistor between DOUTBP and DOUTBM close to the receiver. Unused in 1-lane mode.
FCLKM	29	O	Negative differential data frame clock output. Connect a 100Ω resistor between FCLKP and FCLKM close to the receiver.
FCLKP	30	O	Positive differential data frame clock output. Connect a 100Ω resistor between FCLKP and FCLKM close to the receiver.
GND	2, 9, 12, 15, 34, 38	P	Ground.
PWDN	22	I	Power-down control; active low. Connect to VDD_1V8 if unused.
REFIO	39	I/O	Internal reference voltage output. External reference voltage input. Connect a 10μF decoupling capacitor to REFM.
REFM	6, 11, 40	P	Reference ground. Connect to GND.
RESET	21	I	Reset input; active low. Connect to VDD_1V8 if unused.
SCLK	18	I	Serial clock input for the configuration interface.
SDI / EXTREF	19	I	SDI is a multifunction logic input; pin function is determined by the SPI_EN pin. SDI has an internal 100kΩ pulldown resistor to GND. SPI_EN = 0b: SDI is the logic input to select between the internal or external reference. Connect SDI to GND for the external reference. Connect SDI to VDD_1V8 for the internal reference. SPI_EN = 1b: Serial data input for the configuration interface
SDO	20	O	Serial data output for the configuration interface.
SMPL_CLKM	31	I	ADC sampling clock input. Negative differential input for the LVDS sampling clock. Connect this pin to GND for the CMOS sampling clock.
SMPL_CLKP	32	I	ADC sampling clock input. Positive differential input for the LVDS sampling clock. Clock input for the CMOS sampling clock.
SMPL_SYNC	33	I	Synchronization input for internal averaging filter. Connect to GND if unused. See the Synchronizing Multiple ADCs section on how to use the SMPL_SYNC pin.
SPI_EN	16	I	Control to enable configuration of the SPI interface; active high. Connect a pullup resistor to VDD_1V8 to keep the configuration interface enabled. Connect to GND if SPI configuration is unused. When SPI_EN = 0, select the reference voltage with the SDI/EXTREF pin.
Thermal Pad	—	P	Exposed thermal pad. Connect to GND.
VCMOUT	5	O	Common-mode voltage output. Use VCMOUT to set the common-mode voltage at the ADC inputs. Connect a 1μF decoupling capacitor to GND.
VDD_1V8	13, 14, 35, 36, 37	P	1.8V power-supply. Connect 1μF and 0.1μF decoupling capacitors to GND.

(1) I = input, O = output, I/O = input or output, G = ground, P = power.

5 Specifications

5.1 Absolute Maximum Ratings

over operating ambient temperature range (unless otherwise noted)⁽¹⁾

	MIN	MAX	UNIT
VDD_1V8 to GND	–0.3	2.1	V
AVDD_5V to GND	–0.3	5.5	V
AINAP, AINAM, AINBP, and AINBM to GND	GND – 0.3	AVDD_5V + 0.3	V
REFIO to REFM	REFM – 0.3	AVDD_5V + 0.3	V
Digital inputs to GND	GND – 0.3	VDD_1V8 + 0.3	V
REFM to GND	–0.3	0.3	V
Input current to any pin except supply pins⁽²⁾	–10	10	mA
Junction temperature, T_J	–40	150	°C
Storage temperature, T_stg	–60	150	°C

(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

(2) Pin current must be limited to 10 mA or less.