SBOS531E August   2010  – June 2019 AFE031

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
  4. 4 Revision History
  5. 5 Description, continued
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Thermal Information
    4. 8.4  Electrical Characteristics: Transmitter (Tx)
    5. 8.5  Electrical Characteristics: Power Amplifier (PA)
    6. 8.6  Electrical Characteristics: Receiver (Rx)
    7. 8.7  Electrical Characteristics: Digital
    8. 8.8  Electrical Characteristics: Two-Wire Interface
    9. 8.9  Electrical Characteristics: Internal Bias Generator
    10. 8.10 Electrical Characteristics: Power Supply
    11. 8.11 Timing Requirements
    12. 8.12 Timing Diagrams
    13. 8.13 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Functional Block Diagram
    2. 9.2 Feature Description
      1. 9.2.1 PA Block
      2. 9.2.2 Tx Block
      3. 9.2.3 Rx Block
      4. 9.2.4 DAC Block
      5. 9.2.5 REF1 and REF2 Blocks
      6. 9.2.6 Zero Crossing Detector Block
      7. 9.2.7 ETx and ERx Blocks
    3. 9.3 Power Supplies
    4. 9.4 Pin Descriptions
      1. 9.4.1 Current Overload
      2. 9.4.2 Thermal Overload
    5. 9.5 Calibration Modes
      1. 9.5.1 Tx Calibration Mode
      2. 9.5.2 Rx Calibration Mode
    6. 9.6 Serial Interface
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Detailed Design Procedure
        1. 10.2.1.1 Line-Coupling Circuit
        2. 10.2.1.2 Circuit Protection
        3. 10.2.1.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Powerline Communications Developer’s Kit
        2. 11.1.2.2 TINA-TI™ (Free Software Download)
        3. 11.1.2.3 TI Precision Designs
        4. 11.1.2.4 WEBENCH Filter Designer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.7 Electrical Characteristics: Digital

At TJ = 25°C, PA_VS = 16 V, VAVDD = VDVDD = 3.3 V, and 10 kΩ connected to PA_ISET (pin 46), unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNIT
Digital Inputs (SCLK, DIN, CS, DAC, SD)
Leakage input current 0 ≤ VIN ≤ DVDD –1 0.01 1 μA
Input logic levels
VIH High-level input voltage 0.7 • DVDD V
VIL Low-level input voltage 0.3 • DVDD V
SD pin high SD > 0.7 • DVDD AFE031 in shutdown
SD pin low SD < 0.3 • DVDD AFE031 in normal operation
DAC pin high DAC > 0.7 • DVDD SPI access to DAC Register
DAC pin low DAC < 0.3 • DVDD SPI access to Command and Data Registers
Digital Outputs (DO, ZC_OUT)
VOH High-level output voltage IOH = 3 mA DVDD – 0.4 DVDD V
VOL Low-level output voltage IOL = –3 mA GND GND + 0.4 V
Digital Outputs (INT, Tx_Flag, Rx_Flag)
IOH High-level output current VOH = 3.3 V 1 μA
VOL Low-level output voltage IOL = 4 mA 0.4 V
IOL Low-level output current VOL = 400 mV 4 mA
INT pin high (open drain) INT sink current < 1 μA Normal operation
INT pin low (open drain)(1) INT < 0.4 V Indicates an interrupt has occurred
Tx_Flag high (open drain) Tx_Flag sink current < 1 μA Indicates Tx block is ready
Tx_Flag low (open drain) Tx_Flag < 0.4 V Indicates Tx block is not ready
Rx_Flag high (open drain) Rx_Flag sink current < 1 μA Indicates Rx block is ready
Rx_Flag low (open drain) Rx_Flag < 0.4 V Indicates Rx block is not ready
DIGITAL TIMING
Gain Timing
Gain select time 0.2 μs
Shutdown Mode Timing
Enable time 4.0 μs
Disable time 2.0 μs
POR Timing
Power-On Reset power-up time DVDD ≥ 2 V 50 μs
(1) When an interrupt is detected (INT pin low), the contents of the I_Flag and T_Flag Registers can be read to determine the reason for the interrupt.