SBOS531E August   2010  – June 2019 AFE031

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
  4. Revision History
  5. Description, continued
  6. Device Comparison Table
  7. Pin Configuration and Functions
    1.     Pin Functions
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Thermal Information
    4. 8.4  Electrical Characteristics: Transmitter (Tx)
    5. 8.5  Electrical Characteristics: Power Amplifier (PA)
    6. 8.6  Electrical Characteristics: Receiver (Rx)
    7. 8.7  Electrical Characteristics: Digital
    8. 8.8  Electrical Characteristics: Two-Wire Interface
    9. 8.9  Electrical Characteristics: Internal Bias Generator
    10. 8.10 Electrical Characteristics: Power Supply
    11. 8.11 Timing Requirements
    12. 8.12 Timing Diagrams
    13. 8.13 Typical Characteristics
  9. Detailed Description
    1. 9.1 Functional Block Diagram
    2. 9.2 Feature Description
      1. 9.2.1 PA Block
      2. 9.2.2 Tx Block
      3. 9.2.3 Rx Block
      4. 9.2.4 DAC Block
      5. 9.2.5 REF1 and REF2 Blocks
      6. 9.2.6 Zero Crossing Detector Block
      7. 9.2.7 ETx and ERx Blocks
    3. 9.3 Power Supplies
    4. 9.4 Pin Descriptions
      1. 9.4.1 Current Overload
      2. 9.4.2 Thermal Overload
    5. 9.5 Calibration Modes
      1. 9.5.1 Tx Calibration Mode
      2. 9.5.2 Rx Calibration Mode
    6. 9.6 Serial Interface
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Detailed Design Procedure
        1. 10.2.1.1 Line-Coupling Circuit
        2. 10.2.1.2 Circuit Protection
        3. 10.2.1.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Powerline Communications Developer’s Kit
        2. 11.1.2.2 TINA-TI™ (Free Software Download)
        3. 11.1.2.3 TI Precision Designs
        4. 11.1.2.4 WEBENCH Filter Designer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics: Power Supply

At TJ = 25°C, PA_VS = 16 V, VAVDD = VDVDD = 3.3 V, and 10 kΩ connected to PA_ISET (pin 46), unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNIT
Operating Supply Range
PA_VS Power amplifier supply voltage 7 24 V
DVDD Digital supply voltage 3.0 3.6 V
AVDD Analog supply voltage 3.0 3.6 V
Quiescent Current SD pin low
IQPA_VS Power amplifier current IO = 0 A, PA = On(1) 49 61 mA
IO = 0 A, PA = Off(2) 10 μA
IQDVDD Digital supply current Tx configuration(3) 1.2 mA
Rx configuration(4) 5 μA
All blocks disabled(5) 5 μA
IQAVDD Analog supply current Tx configuration(3) 2.8 3.7 mA
Rx configuration(4) 3.6 5.3 mA
All blocks disabled(5) 30 μA
Shutdown (SD)
PA_VS Power amplifier supply voltage SD pin high 75 150 μA
DVDD Digital supply voltage SD pin high 5 10 μA
AVDD Analog supply voltage SD pin high 15 40 μA
Temperature
Specified range –40 125 °C
Enable1 Register = 00100011, Enable2 Register = 00001110.
Enable1 Register = 00000100, Enable2 Register = 00000110.
In the Tx configuration, the following blocks are enabled: DAC, Tx, PA, REF1, and REF2. All other blocks are disabled. Enable1 Register = 00100011, Enable2 Register = 00001110.
In the Rx configuration, the following blocks are enabled: Rx, REF1, and REF2. All other blocks are disabled. Enable1 Register = 00000100, Enable2 Register = 00000110.
Enable1 Register = 00000000, Enable2 Register = 00000000.