SBOS531E August   2010  – June 2019 AFE031

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
  4. 4 Revision History
  5. 5 Description, continued
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Thermal Information
    4. 8.4  Electrical Characteristics: Transmitter (Tx)
    5. 8.5  Electrical Characteristics: Power Amplifier (PA)
    6. 8.6  Electrical Characteristics: Receiver (Rx)
    7. 8.7  Electrical Characteristics: Digital
    8. 8.8  Electrical Characteristics: Two-Wire Interface
    9. 8.9  Electrical Characteristics: Internal Bias Generator
    10. 8.10 Electrical Characteristics: Power Supply
    11. 8.11 Timing Requirements
    12. 8.12 Timing Diagrams
    13. 8.13 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Functional Block Diagram
    2. 9.2 Feature Description
      1. 9.2.1 PA Block
      2. 9.2.2 Tx Block
      3. 9.2.3 Rx Block
      4. 9.2.4 DAC Block
      5. 9.2.5 REF1 and REF2 Blocks
      6. 9.2.6 Zero Crossing Detector Block
      7. 9.2.7 ETx and ERx Blocks
    3. 9.3 Power Supplies
    4. 9.4 Pin Descriptions
      1. 9.4.1 Current Overload
      2. 9.4.2 Thermal Overload
    5. 9.5 Calibration Modes
      1. 9.5.1 Tx Calibration Mode
      2. 9.5.2 Rx Calibration Mode
    6. 9.6 Serial Interface
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Detailed Design Procedure
        1. 10.2.1.1 Line-Coupling Circuit
        2. 10.2.1.2 Circuit Protection
        3. 10.2.1.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Powerline Communications Developer’s Kit
        2. 11.1.2.2 TINA-TI™ (Free Software Download)
        3. 11.1.2.3 TI Precision Designs
        4. 11.1.2.4 WEBENCH Filter Designer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.6 Electrical Characteristics: Receiver (Rx)

At TJ = 25°C, PA_VS = 16 V, VAVDD = VDVDD = 3.3 V, and 10 kΩ connected to PA_ISET (pin 46), unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNIT
Rx PGA1
Input
Input voltage range 10 VPP
RI Input resistance G = 2 V/V 10 kΩ
G = 1 V/V 15 kΩ
G = 0.5 V/V 20 kΩ
G = 0.25 V/V 24 kΩ
Frequency Response
BW Bandwidth G = 2 V/V 6 MHz
G = 1 V/V 10 MHz
G = 0.5 V/V 13 MHz
G = 0.25 V/V 15 MHz
Output
VO Voltage output swing from AGND or AVDD RLOAD = 6 kΩ, connected to AVDD/2 10 100 mV
IO Maximum continuous current, dc Sourcing 25 mA
Sinking 25 mA
RO Output resistance G = 1, f = 100 kHz 1 Ω
Gain
Gain error G = 0.25 V/V –1% ±0.1% 1%
G = 0.5 V/V –1% ±0.1% 1%
G = 1 V/V –1% ±0.1% 1%
G = 2 V/V –2% ±0.2% 2%
Gain error drift TJ = –40°C to +125°C 1 ppm/°C
Rx Filter
Input
Input voltage range GND – 0.1 AVDD + 0.1 V
RIN Input resistance 6 kΩ
Frequency Response
CENELEC A Mode Rx_C1 = 680 pF, Rx_C2 = 680 pF
Passband frequency –3 dB 90 kHz
Stop band attentuation –25 –33 dB
Stop band frequency 270 kHz
Filter gain 0 dB
CENELEC B/C/D Modes Rx_C1 = 270 pF, Rx_C2 = 560 pF
Passband frequency –3 dB 145 kHz
Stop band attenuation –23 –27 dB
Stop band frequency 350 kHz
Filter gain 0 dB
Output
VO Voltage output swing from AGND or AVDD RLOAD = 10 kΩ, connected to AVDD/2 10 100 mV
IO Maximum continuous current, dc Sourcing 25 mA
Sinking 25 mA
RO Output resistance f = 100 kHz 5 Ω
Rx PGA2
Input
Input voltage range GND – 0.1 AVDD + 0.1 V
RI Input impedance G = 64 V/V 1.7 kΩ
G = 16 V/V 6.3 kΩ
G = 4 V/V 21 kΩ
G = 1 V/V 53 kΩ
Frequency Response
BW Bandwidth G = 64 V/V 300 kHz
G = 16 V/V 800 kHz
G = 4 V/V 1.4 MHz
G = 1 V/V 4 MHz
Output
VO Voltage output swing from AGND or AVDD RLOAD = 10 kΩ, connected to AVDD/2 10 100 mV
IO Maximum continuous current, dc Sourcing 25 mA
Sinking 25 mA
RO Output impedance G = 1, f = 100 kHz 1 Ω
Gain
Gain error G = 1 V/V –2% ±1% 2%
G = 4 V/V –2% ±1% 2%
G = 16 V/V –2% ±1% 2%
G = 64 V/V –4% ±1% 4%
Gain error drift TJ = –40°C to +125°C 6 ppm/°C
Rx Sensitivity
Integrated noise, RTI(1)
CENELEC Band A
(40 kHz to 90 kHz)		 Noise-reducing capacitor = 1 μF from
pin 28 to ground		 14 μVRMS
CENELEC Bands B/C/D
(95 kHz to 140 kHz)		 Noise-reducing capacitor = 1 μF from
pin 28 to ground		 11 μVRMS
(1) Includes Rx PGA1, Rx_Filter, Rx PGA2, and REF2 bias generator.