SBAS650C May   2014  – April 2021 AFE4403

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Family Options
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Timing Requirements: Supply Ramp and Power-Down
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Receiver Channel
        1. 8.3.1.1 Receiver Front-End
        2. 8.3.1.2 Ambient Cancellation Scheme and Second Stage Gain Block
        3. 8.3.1.3 Receiver Control Signals
        4. 8.3.1.4 Receiver Timing
      2. 8.3.2 Clocking and Timing Signal Generation
      3. 8.3.3 Timer Module
        1. 8.3.3.1 Using the Timer Module
      4. 8.3.4 Receiver Subsystem Power Path
      5. 8.3.5 Transmit Section
        1. 8.3.5.1 Third LED Support
        2. 8.3.5.2 Transmitter Power Path
        3. 8.3.5.3 LED Power Reduction During Periods of Inactivity
        4. 8.3.5.4 LED Configurations
    4. 8.4 Device Functional Modes
      1. 8.4.1 ADC Operation and Averaging Module
        1. 8.4.1.1 Operation Without Averaging
        2. 8.4.1.2 Operation With Averaging
        3. 8.4.1.3 Dynamic Power-Down Mode
      2. 8.4.2 Diagnostics
        1. 8.4.2.1 Photodiode-Side Fault Detection
        2. 8.4.2.2 Transmitter-Side Fault Detection
        3. 8.4.2.3 Diagnostics Module
    5. 8.5 Programming
      1. 8.5.1 Serial Programming Interface
      2. 8.5.2 Reading and Writing Data
        1. 8.5.2.1 Writing Data
        2. 8.5.2.2 Reading Data
        3. 8.5.2.3 Multiple Data Reads and Writes
        4. 8.5.2.4 Register Initialization
        5. 8.5.2.5 AFE SPI Interface Design Considerations
    6. 8.6 Register Maps
      1. 8.6.1 AFE Register Map
      2. 8.6.2 AFE Register Description
  9. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Consumption Considerations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.5 Transmit Section

The transmit section integrates the LED driver and the LED current control section with 8-bit resolution.

The RED and IR LED reference currents can be independently set. The current source (ILED) locally regulates and ensures that the actual LED current tracks the specified reference. The transmitter section uses an internal 0.25-V reference voltage for operation. This reference voltage is available on the TX_REF pin and must be decoupled to ground with a 2.2-μF capacitor. The TX_REF voltage is derived from the TX_CTRL_SUP. The TX_REF voltage can be programmed from 0.25 V to 1 V. A lower TX_REF voltage allows a lower voltage to be supported on LED_DRV_SUP. However, the transmitter dynamic range falls in proportion to the voltage on TX_REF. Thus, a TX_REF setting of 0.5 V gives a 6-dB lower transmitter dynamic range as compared to a 1-V setting on TX_REF, and a 6-dB higher transmitter dynamic range as compared to a 0.25-V setting on TX_REF.

Note that reducing the value of the band-gap reference capacitor on the BG pin reduces the time required for the device to wake-up and settle. However, this reduction in time is a trade-off between wake-up time and noise performance.For example, reducing the value of the capacitors on the BG and TX_REF pins from 2.2 uF to 0.1 uF reduces the wake-up time (from complete power-down) from 1000 ms to 100 ms, but results in a few decibels of degradation in the transmitter dynamic range.

The minimum LED_DRV_SUP voltage required for operation depends on:

  • Voltage drop across the LED (VLED),
  • Voltage drop across the external cable, connector, and any other component in series with the LED (VCABLE), and
  • Transmitter reference voltage.

See the Recommended Operating Conditions table for further details.

Two LED driver schemes are supported:

  • An H-bridge drive for a two-terminal back-to-back LED package; see Figure 8-16.
  • A push-pull drive for a three-terminal LED package; see Figure 8-17.

GUID-9744EF49-9148-4A2F-90AB-30E1D689492C-low.gifFigure 8-16 Transmit: H-Bridge Drive
GUID-13D54E76-37BC-43CF-B1CF-D497DFC8E873-low.gifFigure 8-17 Transmit: Push-Pull LED Drive for Common Anode LED Configuration