SLASF43 December 2023 AFE782H1 , AFE882H1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Table 7-14 lists the memory-mapped registers for the AFEx82H1 registers. Consider all register offset addresses not listed in Table 7-14 as reserved locations; do not modify these register contents.
ADDR (HEX) | REGISTER | BIT DESCRIPTION | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | ||
00h | NOP | NOP [15:0] | |||||||||||||||
01h | DAC_DATA | DATA [15:0] | |||||||||||||||
02h | CONFIG | CRC_ERR_CNT [1:0] | CLKO [3:0] | UBM_ IRQ_EN |
IRQ_ PIN_EN |
CLR_ PIN_EN |
UART_DIS | UART_ BAUD |
CRC_EN | IRQ_POL | IRQ_LVL | DSDO | FSDO | ||||
03h | DAC_CFG | RESERVED | PD | SR_CLK [2:0] | SR_STEP [2:0] | SR_EN | SR_MODE | RESERVED | CLR | RESERVED | |||||||
04h | DAC_GAIN | GAIN [15:0] | |||||||||||||||
05h | DAC_OFFSET | OFFSET [15:0] | |||||||||||||||
06h |
DAC_CLR_ CODE |
CODE [15:0] | |||||||||||||||
07h | RESET | RESERVED | SW_RST [7:0] | ||||||||||||||
08h | ADC_CFG | BUF_PD | HYST [6:0] | FLT_CNT [2:0] | AIN_ RANGE |
EOC_ PER_CH |
CONV_RATE [1:0] | DIRECT_ MODE |
|||||||||
09h |
ADC_INDEX_ CFG |
RESERVED | STOP [3:0] | START [3:0] | |||||||||||||
0Ah | TRIGGER | RESERVED | RBIST | MBIST | SHADOW LOAD |
ADC | |||||||||||
0Bh |
SPECIAL_ CFG(1) |
RESERVED | OTP_ LOAD_ SW_RST |
ALMV_ POL |
AIN1_ENB | ||||||||||||
0Eh | MODEM_CFG | Tx2200Hz | RESERVED | DUPLEX_ EXT |
RX_ HORD_EN |
RX_EXT FILT_EN |
TxRES | TxAMP [4:0] | HART_EN | DUPLEX | TxHPD | RTS | |||||
0Fh | FIFO_CFG | RESERVED | FIFO_H2U_FLUSH | FIFO_U2H_FLUSH | H2U_LEVEL_SET [3:0] | U2H_LEVEL_SET [3:0] | |||||||||||
10h | ALARM_ACT | SD_FLT [1:0] | TEMP_FLT [1:0] | AIN1_FLT [1:0] | AIN0_FLT [1:0] | CRC_WDT_FLT [1:0] | VREF_FLT [1:0] | THERM_ERR_FLT [1:0] | THERM_WARN_FLT [1:0] | ||||||||
11h | WDT | RESERVED | WDT_UP [2:0] | WDT_LO [1:0] | WDT_EN | ||||||||||||
12h |
AIN0_ THRESHOLD |
Hi [7:0] | Lo [7:0] | ||||||||||||||
13h |
AIN1_ THRESHOLD |
Hi [7:0] | Lo [7:0] | ||||||||||||||
14h |
TEMP_ THRESHOLD |
Hi [7:0] | Lo [7:0] | ||||||||||||||
15h | FIFO_U2H_WR | RESERVED | PARITY | DATA [7:0] | |||||||||||||
16h | UBM(2) | RESERVED | REG_ MODE |
||||||||||||||
18h | SCRATCH | DATA [15:0] | |||||||||||||||
19h | CHIP_ID_LSB | ID [15:0] | |||||||||||||||
1Ah | CHIP_ID_MSB | ID [15:0] | |||||||||||||||
1Bh | GPIO_CFG | RESERVED | EN [6:0] | RESERVED | ODE [6:0] | ||||||||||||
1Ch | GPIO | RESERVED | DATA [6:0] | ||||||||||||||
1Dh |
ALARM_ STATUS_MASK |
RESERVED | SD_FLT | OSC_FAIL | RESERVED | OTP_ CRC_ERR |
CRC_FLT | WD_FLT | VREF_FLT | ADC_ AIN1_FLT |
ADC_ AIN0_FLT |
ADC_ TEMP_ FLT |
THERM_ ERR_FLT |
THERM_ WARN_ FLT |
|||
1Eh | GEN_ STATUS_MASK |
RESERVED | BIST_ DONE |
BIST_ FAIL |
RESERVED | SR_ BUSYn |
ADC_ EOC |
RESERVED | BREAK_ FRAME_ ERR |
BREAK_ PARITY_ ERR |
UART_ FRAME_ ERR |
UART_ PARITY_ ERR |
|||||
1Fh |
MODEM_ STATUS_MASK |
RESERVED | GAP_ ERR |
FRAME_ ERR |
PARITY_ ERR |
FIFO_H2U _LEVEL_ FLAG |
FIFO_H2U _FULL_ FLAG |
FIFO_H2U _EMPTY_ FLAG |
FIFO_U2H _LEVEL_ FLAG |
FIFO_U2H _FULL_ FLAG |
FIFO_U2H _EMPTY_ FLAG |
CD_DE ASSERT |
CD_ ASSERT |
CTS_DE ASSERT |
CTS_ ASSERT |
||
20h |
ALARM_ STATUS |
GEN_ IRQ |
MODEM_ IRQ |
SD_FLT | OSC_FAIL | CRC_CNT [1:0] | OTP_ LOADEDn |
OTP_ CRC_ERR |
CRC_FLT | WD_FLT | VREF_FLT | ADC_ AIN1_FLT |
ADC_ AIN0_FLT |
ADC_ TEMP_ FLT |
THERM_ ERR_FLT |
THERM_ WARN_ FLT |
|
21h |
GEN_ STATUS |
ALARM_ IRQ |
MODEM_ IRQ |
RESERVED | OTP_ BUSY |
BIST_ MODE |
BIST_ DONE |
BIST_ FAIL |
RESET | SR_ BUSYn |
ADC_ EOC |
ADC_ BUSY |
PVDD_HI | BREAK_ FRAME_ ERR |
BREAK_ PARITY_ ERR |
UART _FRAME _ERR |
UART_ PARITY_ ERR |
22h |
MODEM_ STATUS |
ALARM_ IRQ |
GEN_ IRQ |
RESERVED | GAP_ ERR |
FRAME_ ERR |
PARITY _ERR |
FIFO_H2U _LEVEL_ FLAG |
FIFO_H2U _FULL_ FLAG |
FIFO_H2U _EMPTY_ FLAG |
FIFO_U2H _LEVEL_ FLAG |
FIFO_U2H _FULL_ FLAG |
FIFO_U2H _EMPTY_ FLAG |
CD_DE ASSERT |
CD_ ASSERT |
CTS_DE ASSERT |
CTS_ ASSERT |
23h | ADC_FLAGS | RESERVED | SD4_FAIL | SD3_FAIL | SD2_FAIL | SD1_FAIL | SD0_FAIL | TEMP_ FAIL |
AIN1_ FAIL |
AIN0_ FAIL |
RESERVED | ||||||
24h | ADC_AIN0 | RESERVED | DATA [11:0] | ||||||||||||||
25h | ADC_AIN1 | RESERVED | DATA [11:0] | ||||||||||||||
26h | ADC_TEMP | RESERVED | DATA [11:0] | ||||||||||||||
27h | ADC_SD_MUX | RESERVED | DATA [11:0] | ||||||||||||||
28h | ADC_OFFSET | RESERVED | DATA [11:0] | ||||||||||||||
2Ah | FIFO_H2U_RD | LEVEL [3:0] | LEVEL_ FLAG |
FULL_ FLAG |
EMPTY_ FLAG |
PARITY | DATA [7:0] | ||||||||||
2Bh | FIFO_STATUS | H2U_LEVEL [3:0] | H2U _LEVEL_ FLAG |
H2U _FULL_ FLAG |
H2U _EMPTY_ FLAG |
RESERVED | U2H_LEVEL [3:0] | U2H _LEVEL_ FLAG |
U2H _FULL_ FLAG |
U2H _EMPTY_ FLAG |
RESERVED | ||||||
2Ch | DAC_OUT | DATA [15:0] | |||||||||||||||
2Dh | ADC_OUT | RESERVED | DATA [11:0] | ||||||||||||||
2Eh | ADC_BYP | DATA_ BYP_EN |
OFST_ BYP_EN |
DIS_GND_ SAMP |
RESERVED | DATA [11:0] | |||||||||||
2Fh | FORCE_FAIL | CRC_FLT | VREF_FLT | THERM_ ERR_FLT |
THERM_ WARN_ FLT |
RESERVED | SD4_HI_ FLT |
SD4_LO_ FLT |
SD3_HI_ FLT |
SD3_LO_ FLT |
SD2_HI_ FLT |
SD2_LO_ FLT |
SD1_HI_ FLT |
SD1_LO_ FLT |
SD0_HI_ FLT |
SD0_LO_ FLT |
|
3Bh | TIMER_CFG_0 | RESERVED | CLK_SEL [1:0] | INVERT | ENABLE | ||||||||||||
3Ch | TIMER_CFG_1 | PERIOD [15:0] | |||||||||||||||
3Dh | TIMER_CFG_2 | SET_TIME [15:0] | |||||||||||||||
3Eh | CRC_RD | CRC [15:0] | |||||||||||||||
3Fh | RBIST_CRC | CRC [15:0] |