Typical values at TA =
+25°C with nominal supplies. Unless otherwise noted, TX input data rate = 750MSPS,
fDAC = 9000MSPS, non-interleave mode, AOUT = –1 dBFS,
2nd Nyquist zone output, External clock mode, 12x Interpolation, DSA
= 0 dB, Sin(x)/x enabled, DSA calibrated, TX Clock Dither Enabled, 7.1GHz
matching.
![AFE7900 TX
Full Scale vs RF Frequency and Channel GUID-20220629-SS0I-5LKT-5NFT-PVRNNGPZ4V07-low.svg](/ods/images/SBASA44B/GUID-20220629-SS0I-5LKT-5NFT-PVRNNGPZ4V07-low.svg)
Excluding PCB and cable losses |
Figure 5-522 TX
Full Scale vs RF Frequency and Channel![AFE7900 TX Full Scale vs DSA Setting and Channel at 7.1
GHz GUID-20210610-CA0I-SF9J-GVGW-NK6JN3TZJFGN-low.svg](/ods/images/SBASA44B/GUID-20210610-CA0I-SF9J-GVGW-NK6JN3TZJFGN-low.svg)
Excluding PCB and cable losses |
Figure 5-524 TX Full Scale vs DSA Setting and Channel at 7.1
GHz![AFE7900 Uncalibrated Differential Gain Error vs Temperature at 7.1 GHz GUID-20210628-CA0I-WH68-R1LW-9PHQMQT5NTDN-low.png](/ods/images/SBASA44B/GUID-20210628-CA0I-WH68-R1LW-9PHQMQT5NTDN-low.png)
Differential Gain Error = Gain(DSA Setting – 1) –
Gain(DSA Setting) |
Figure 5-526 Uncalibrated Differential Gain Error vs Temperature at 7.1 GHz![AFE7900 Calibrated Differential Gain Error vs Temperature at 7.1 GHz GUID-20210628-CA0I-9WWQ-07BG-LW1D2NH4FDTX-low.png](/ods/images/SBASA44B/GUID-20210628-CA0I-9WWQ-07BG-LW1D2NH4FDTX-low.png)
Differential Gain Error = Gain(DSA Setting – 1) –
Gain(DSA Setting) |
Figure 5-528 Calibrated Differential Gain Error vs Temperature at 7.1 GHz![AFE7900 Uncalibrated Integrated Gain Error vs Temperature at 7.1 GHz GUID-20210628-CA0I-P9DB-XXXN-H1LR53XKGM7H-low.png](/ods/images/SBASA44B/GUID-20210628-CA0I-P9DB-XXXN-H1LR53XKGM7H-low.png)
Integrated Gain Error = Gain(DSA Setting) – Gain(DSA
Setting = 0). |
Figure 5-530 Uncalibrated Integrated Gain Error vs Temperature at 7.1 GHz![AFE7900 Calibrated Integrated Gain Error vs Temperature at 7.1 GHz GUID-20210628-CA0I-BTXX-TWJ6-DXW27M1BCKJQ-low.svg](/ods/images/SBASA44B/GUID-20210628-CA0I-BTXX-TWJ6-DXW27M1BCKJQ-low.svg)
Integrated Gain Error = Gain(DSA Setting) – Gain(DSA
Setting = 0). |
Figure 5-532 Calibrated Integrated Gain Error vs Temperature at 7.1 GHz![AFE7900 Uncalibrated Differential Phase Error vs Temperature at 7.1 GHz GUID-20210628-CA0I-ZPFJ-VHLK-KDVJGZJCFMSV-low.svg](/ods/images/SBASA44B/GUID-20210628-CA0I-ZPFJ-VHLK-KDVJGZJCFMSV-low.svg)
Differential Phase Error = Phase(DSA Setting – 1) –
Phase(DSA Setting) |
Figure 5-534 Uncalibrated Differential Phase Error vs Temperature at 7.1 GHz![AFE7900 Calibrated Differential Phase Error vs Temperature at 7.1 GHz GUID-20210628-CA0I-HVKT-LBDG-NVDMCQ70M4ND-low.svg](/ods/images/SBASA44B/GUID-20210628-CA0I-HVKT-LBDG-NVDMCQ70M4ND-low.svg)
Differential Phase Error = Phase(DSA Setting – 1) –
Phase(DSA Setting) |
Figure 5-536 Calibrated Differential Phase Error vs Temperature at 7.1 GHz![AFE7900 Uncalibrated Integrated Phase Error vs Temperature at 7.1 GHz GUID-20210628-CA0I-D1F3-SCTJ-7DF6WKGD0D9D-low.png](/ods/images/SBASA44B/GUID-20210628-CA0I-D1F3-SCTJ-7DF6WKGD0D9D-low.png)
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA
Setting = 0) |
Figure 5-538 Uncalibrated Integrated Phase Error vs Temperature at 7.1 GHz![AFE7900 Calibrated Integrated Phase Error vs Temperature at 7.1 GHz GUID-20210628-CA0I-QRWP-KP5X-92MK5KHJRRJN-low.png](/ods/images/SBASA44B/GUID-20210628-CA0I-QRWP-KP5X-92MK5KHJRRJN-low.png)
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA
Setting = 0) |
Figure 5-540 Calibrated Integrated Phase Error vs Temperature at 7.1 GHz
Figure 5-542 IMD3 vs Digital Amplitude and Temperature at 7.1
GHz
Figure 5-544 IMD3 vs DSA Setting and Digital Amplitude at 7.1
GHz
Figure 5-546 IMD3 vs Tone Spacing and Channel at 7.1 GHz
Figure 5-548 IMD3 vs Tone Spacing and Temperature at 7.1
GHz
Figure 5-550 NSD
vs DSA Setting and Amplitude at 7.1 GHz
Figure 5-552 NSD
vs Digital Amplitude and Channel at 7.1 GHz![AFE7900 Two Tone Inband SFDR vs Digital Amplitude at 7.1
GHz GUID-20210709-CA0I-MDH0-XFQD-H554TKJB8WPM-low.svg](/ods/images/SBASA44B/GUID-20210709-CA0I-MDH0-XFQD-H554TKJB8WPM-low.svg)
Inband
= 7100MHz ± 600MHz, excluding IMD3 components,
3*FS/4 spur not included and shown
separately |
Figure 5-554 Two Tone Inband SFDR vs Digital Amplitude at 7.1
GHz
Figure 5-556 Single Tone Output Spectrum at 7.1GHz, -1dBFS
(Inband)
Figure 5-558 Single Tone Output Spectrum at 7.1GHz, -6dBFS
(Inband)
Figure 5-560 Single Tone Output Spectrum at 7.1GHz, -12dBFS
(Inband)
Figure 5-562 Two Tone Output Spectrum at 7.1GHz, -7dBFS each
(Inband)
Figure 5-564 Two Tone Output Spectrum at 7.1GHz, -13dBFS each
(Inband)
Figure 5-566 Two Tone Output Spectrum at 7.1GHz, -30dBFS each
(Inband)![AFE7900 TX Full Scale vs Temperature and Channel at
7.1GHz GUID-20210610-CA0I-9PGH-XFQH-49CFLWZN3BN5-low.svg](/ods/images/SBASA44B/GUID-20210610-CA0I-9PGH-XFQH-49CFLWZN3BN5-low.svg)
Excluding PCB and cable losses |
Figure 5-523 TX Full Scale vs Temperature and Channel at
7.1GHz![AFE7900 Uncalibrated Differential Gain Error vs Channel at 7.1 GHz GUID-20210628-CA0I-CZL0-MVLQ-S4M04SNGPFJ1-low.png](/ods/images/SBASA44B/GUID-20210628-CA0I-CZL0-MVLQ-S4M04SNGPFJ1-low.png)
Differential Gain Error = Gain(DSA Setting – 1) –
Gain(DSA Setting) |
Figure 5-525 Uncalibrated Differential Gain Error vs Channel at 7.1 GHz![AFE7900 Calibrated Differential Gain Error vs Channel at 7.1 GHz GUID-20210628-CA0I-2J9H-G1RX-4QLXVG7XQ5MR-low.svg](/ods/images/SBASA44B/GUID-20210628-CA0I-2J9H-G1RX-4QLXVG7XQ5MR-low.svg)
Differential Gain Error = Gain(DSA Setting – 1) –
Gain(DSA Setting) |
Figure 5-527 Calibrated Differential Gain Error vs Channel at 7.1 GHz![AFE7900 Uncalibrated Integrated Gain Error vs Channel at 7.1 GHz GUID-20210628-CA0I-QCLW-8LCS-ML5GKHHK5HWJ-low.svg](/ods/images/SBASA44B/GUID-20210628-CA0I-QCLW-8LCS-ML5GKHHK5HWJ-low.svg)
Integrated Gain Error = Gain(DSA Setting) – Gain(DSA
Setting = 0). |
Figure 5-529 Uncalibrated Integrated Gain Error vs Channel at 7.1 GHz![AFE7900 Calibrated Integrated Gain Error vs Channel at 7.1 GHz GUID-20210628-CA0I-MKRV-JM12-CXBPJHCQGVQW-low.png](/ods/images/SBASA44B/GUID-20210628-CA0I-MKRV-JM12-CXBPJHCQGVQW-low.png)
Integrated Gain Error = Gain(DSA Setting) – Gain(DSA
Setting = 0). |
Figure 5-531 Calibrated Integrated Gain Error vs Channel at 7.1 GHz![AFE7900 Uncalibrated Differential Phase Error vs Channel at 7.1 GHz GUID-20210628-CA0I-KDJZ-FWLF-371HKW4RF8S4-low.svg](/ods/images/SBASA44B/GUID-20210628-CA0I-KDJZ-FWLF-371HKW4RF8S4-low.svg)
Differential Phase Error = Phase(DSA Setting – 1) –
Phase(DSA Setting) |
Figure 5-533 Uncalibrated Differential Phase Error vs Channel at 7.1 GHz![AFE7900 Calibrated Differential Phase Error vs Channel at 7.1 GHz GUID-20210628-CA0I-GPD3-8MHD-SDVSC5GG2DM7-low.png](/ods/images/SBASA44B/GUID-20210628-CA0I-GPD3-8MHD-SDVSC5GG2DM7-low.png)
Differential Phase Error = Phase(DSA Setting – 1) –
Phase(DSA Setting) |
Figure 5-535 Calibrated Differential Phase Error vs Channel at 7.1 GHz![AFE7900 Uncalibrated Integrated Phase Error vs Channel at 7.1 GHz GUID-20210628-CA0I-W2TG-V01Q-S7B7WCSNH6WR-low.png](/ods/images/SBASA44B/GUID-20210628-CA0I-W2TG-V01Q-S7B7WCSNH6WR-low.png)
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA
Setting = 0) |
Figure 5-537 Uncalibrated Integrated Phase Error vs Channel at 7.1 GHz![AFE7900 Calibrated Integrated Phase Error vs Channel at 7.1 GHz GUID-20210628-CA0I-MBFK-K9F6-NTJJ0ZR6T2RX-low.png](/ods/images/SBASA44B/GUID-20210628-CA0I-MBFK-K9F6-NTJJ0ZR6T2RX-low.png)
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA
Setting = 0) |
Figure 5-539 Calibrated Integrated Phase Error vs Channel at 7.1 GHz
Figure 5-541 IMD3 vs Digital Amplitude and Channel at 7.1
GHz
Figure 5-543 IMD3 vs DSA Setting and Channel at 7.1 GHz
Figure 5-545 IMD3 vs DSA Setting and Temperature at 7.1
GHz
Figure 5-547 IMD3 vs Tone Spacing and Digital Amplitude at 7.1
GHz![AFE7900 NSD
vs DSA Setting and Channel at 7.1 GHz GUID-20210628-CA0I-BT2J-TSHN-CGV0TH668HVQ-low.svg](/ods/images/SBASA44B/GUID-20210628-CA0I-BT2J-TSHN-CGV0TH668HVQ-low.svg)
Tone
at -12dBFS, 50MHz offset from tone |
Figure 5-549 NSD
vs DSA Setting and Channel at 7.1 GHz![AFE7900 NSD
vs DSA Setting and Temperature at 7.1 GHz GUID-20210628-CA0I-P40V-HLCD-N1S1PJKNLJQV-low.png](/ods/images/SBASA44B/GUID-20210628-CA0I-P40V-HLCD-N1S1PJKNLJQV-low.png)
Tone
at -12dBFS, 50MHz offset from tone |
Figure 5-551 NSD
vs DSA Setting and Temperature at 7.1 GHz
Figure 5-553 NSD
vs Digital Amplitude and Temperature at 7.1 GHz
Figure 5-555 Single Tone Output Spectrum at 7.1GHz, -1dBFS
(Nyquist)
Figure 5-557 Single Tone Output Spectrum at 7.1GHz, -6dBFS
(Nyquist)
Figure 5-559 Single Tone Output Spectrum at 7.1GHz, -12dBFS
(Nyquist)
Figure 5-561 Two Tone Output Spectrum at 7.1GHz, -7dBFS each
(Nyquist)
Figure 5-563 Two Tone Output Spectrum at 7.1GHz, -13dBFS each
(Nyquist)
Figure 5-565 Two Tone Output Spectrum at 7.1GHz, -30dBFS each
(Nyquist)
Figure 5-567 External Clock Additive Phase Noise at 7.1 GHz