SBASAO5A april   2023  – june 2023 AFE7901

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Description (continued)
  6. 5Revision History
  7. 6Pin Configuration and Functions
  8. 7Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information AFE79xx
    5. 7.5  Transmitter Electrical Characteristics
    6. 7.6  RF ADC Electrical Characteristics
    7. 7.7  PLL/VCO/Clock Electrical Characteristics
    8. 7.8  Digital Electrical Characteristics
    9. 7.9  Power Supply Electrical Characteristics
    10. 7.10 Timing Requirements
    11. 7.11 Switching Characteristics
    12. 7.12 Typical Characteristics
      1. 7.12.1  RX Typical Characteristics 30 MHz and 400 MHz
      2. 7.12.2  RX Typical Characteristics at 800 MHz
      3. 7.12.3  RX Typical Characteristics 1.75 GHz to 1.9 GHz
      4. 7.12.4  RX Typical Characteristics 2.6 GHz
      5. 7.12.5  RX Typical Characteristics 3.5 GHz
      6. 7.12.6  RX Typical Characteristics 4.9 GHz
      7. 7.12.7  RX Typical Characteristics 6.8 GHz
      8. 7.12.8  TX Typical Characteristics at 30 MHz and 400 MHz
      9. 7.12.9  TX Typical Characteristics at 800 MHz
      10. 7.12.10 TX Typical Characteristics at 1.8 GHz
      11. 7.12.11 TX Typical Characteristics at 2.6 GHz
      12. 7.12.12 TX Typical Characteristics at 3.5 GHz
      13. 7.12.13 TX Typical Characteristics at 4.9 GHz
      14. 7.12.14 TX Typical Characteristics at 7.1 GHz
      15. 7.12.15 PLL and Clock Typical Characteristics
  9. 8Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.12.12 TX Typical Characteristics at 3.5 GHz

Typical values at TA = +25°C with nominal supplies. Unless otherwise noted, TX input data rate = 491.52 MSPS, fDAC = 11796.48 MSPS, interleave mode, AOUT = –1 dBFS, 1st Nyquist zone output, Internal PLL, fREF = 491.52 MSPS, 24x Interpolation, DSA = 0 dB, Sin(x)/x enabled, DSA calibrated.

GUID-01176F56-7633-4972-B40E-29CAEFFDC30C-low.gif
Aout = -0.5 dFBS, 3.5 GHz Matching, included PCB and cable losses
Figure 7-453 TX Output Power vs DSA Setting at 3.5 GHz
GUID-A6B4C2C3-1DDB-4F6D-A62C-BD2B6653FBC7-low.gif
3.5 GHz Matching, included PCB and cable losses
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 7-455 TX Uncalibrated Differential Gain Error vs DSA Setting and Channel at 3.5 GHz
GUID-A5C5DB85-133E-43DE-BC56-D8C0BB7B4F76-low.gif
3.5 GHz Matching, included PCB and cable losses
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 7-457 TX Uncalibrated Integrated Gain Error vs DSA Setting and Channel at 3.5 GHz
GUID-D525CC63-ABD9-44FC-A877-2580BE913526-low.gif
3.5 GHz Matching, included PCB and cable losses
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 7-459 TX Uncalibrated Differential Phase Error vs DSA Setting and Channel at 3.5 GHz
GUID-E20ABB44-C140-4129-A030-2818B88A135B-low.gif
3.5 GHz Matching, included PCB and cable losses
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 7-461 TX Uncalibrated Integrated Phase Error vs DSA Setting and Channel at 3.5 GHz
GUID-EC6E4AED-6855-452B-AC1F-2E9054D75966-low.gif
3.5 GHz Matching, 1TX
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 7-463 TX Uncalibrated Differential Gain Error vs DSA Setting and Temperature at 3.5 GHz
GUID-7A6E38D0-9F8F-4AAB-BC84-36288F553332-low.gif
3.5 GHz Matching, 1TX
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 7-465 TX Uncalibrated Integrated Gain Error vs DSA Setting and Temperature at 3.5 GHz
GUID-078873A6-A95E-47E5-8B88-807D9976A6A4-low.gif
3.5 GHz Matching, 1TX
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 7-467 TX Uncalibrated Differential Phase Error vs DSA setting and Temperature at 3.5 GHz
GUID-2EB4D7B0-76D7-4BBE-9D62-4318CE4C2A3F-low.gif
3.5 GHz Matching, 1TX
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting=0)
Figure 7-469 TX Uncalibrated Integrated Phase Error vs DSA Setting and Temperature at 3.5 GHz
GUID-C5AB983C-A8C0-46FC-A577-85A44DA68ACC-low.gif
A.
fDAC=11796.48 MSPS, interleave mode, matching at 3.5 GHz, Aout = –13 dBFS.
Figure 7-471 TX NSD vs DSA Setting at 3.5 GHz
GUID-E4AB3B34-E3A4-4451-B366-6C25428BAAF5-low.svg
A.
fDAC = 12 MSPS, external clock mode, non-interleave mode
Figure 7-473 TX NSD vs Digital Amplitude and Channel at 3.75 GHz
GUID-7384CFCD-E00A-498D-A292-976298273A75-low.svg
20-MHz tone spacing, 3.5 GHz Matching
Figure 7-475 TX IMD3 vs Digital Amplitude and Channel at 3.5 GHz
GUID-D7F7D277-32D3-4152-8656-598F71578D05-low.svg
External clock mode, non-interleave mode
Figure 7-477 TX IMD3 vs Tone Spacing and Channel at 3.75 GHz
GUID-9AA507FC-313D-45B6-BA27-41EB49BE117C-low.svg
Inband = 3.75 GHz ± 600 MHz, fDAC = 9 GSPS, external clock mode, non-interleave mode.
Figure 7-479 Two Tone Inband SFDR vs Digital Amplitude at 3.75 GHz
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3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 7-481 TX 100-MHz NR Output Spectrum at 3.5 GHz (Band 42)
GUID-4D33636F-7AF3-46C8-962C-84B3D5EB5004-low.gif
3.5 GHz Matching, single carrier 20-MHz BW NR TM1.1 LTE
Figure 7-483 TX 20-MHz LTE ACPR vs DSA Setting at 3.5 GHz
GUID-40ADDC3F-F771-4A8B-80A8-48AB1F836300-low.gif
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 7-485 TX 100-MHz NR ACPR vs DSA Setting at 3.5 GHz
GUID-BF10833B-5B1D-437A-BD68-F6AC9E71C5A9-low.gif
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 7-487 TX 20-MHz LTE ACPR vs Digital Level at 3.5 GHz
GUID-E031A895-2FFE-49AA-BEDB-BF0CC4C23CCF-low.gif
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 7-489 TX 100-MHz NR ACPR vs Digital Level at 3.5 GHz
GUID-FDE26AF0-6FC0-4DFE-AF32-AED37BD248E9-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode, normalized to output power at harmonic frequency
Figure 7-491 TX Single Tone HD2 vs Frequency and Digital Level at 3.5 GHz
GUID-8F9D3532-27D4-4E59-9347-EACAEB6E0D60-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode.
Figure 7-493 TX Single Tone (–1 dBFS) Output Spectrum at 3.5 GHz (0 - fDAC)
GUID-D62C2A89-F903-4B9C-A9D0-BF244D5B4E7F-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode.
Figure 7-495 TX Single Tone (–6 dBFS) Output Spectrum at 3.5 GHz (0-fDAC)
GUID-333FFA80-B9E9-4299-BD32-7AF662A5A2A3-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode.
Figure 7-497 TX Single Tone (–12 dBFS) Output Spectrum at 3.5 GHz (0-fDAC)
GUID-25CFB100-4EF6-4C54-8A17-965E63313C51-low.png
Matching at 3.5 GHz, 50 MHz tone spacing, fDAC = 12 GSPS, non-interleave mode.
Figure 7-499 TX Dual Tone Output Spectrum at 3.75 GHz, -7 dBFS each (0 - fDAC)
GUID-6E313455-9F38-4593-8554-66ADE141DE32-low.svg
Matching at 3.5 GHz, 50 MHz tone spacing, fDAC = 12 GSPS, non-interleave mode.
Figure 7-501 TX Dual Tone Output Spectrum at 3.75 GHz, -13 dBFS each (0 - fDAC)
GUID-9123C05F-99BB-4072-BA6C-77D00E3275FD-low.png
Matching at 3.5 GHz, 50 MHz tone spacing, fDAC = 12 GSPS, non-interleave mode.
Figure 7-503 TX Dual Tone Output Spectrum at 3.75 GHz, -30 dBFS each (0 - fDAC)
GUID-CE811C7C-737D-4B5A-A772-4EA5592872C2-low.svg
fDAC = fCLK = 12 GSPS, non-interleave mode.
Figure 7-505 External Clock Additive Phase Noise at 3.7 GHz
GUID-3C796A41-D21E-4E98-BA0A-748995424622-low.gif
Aout = -0.5 dFBS, 3.5 GHz Matching, included PCB and cable losses
Figure 7-454 TX Output Power vs Frequency
GUID-8C5F19FF-022B-4048-98BD-942F5CA1C0A6-low.gif
3.5 GHz Matching, included PCB and cable losses
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 7-456 TX Calibrated Differential Gain Error vs DSA Setting and Channel at 3.5 GHz
GUID-C0457466-6886-441F-A9B2-51E13766F5A3-low.gif
3.5 GHz Matching, included PCB and cable losses
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 7-458 TX Calibrated Integrated Gain Error vs DSA Setting and Channel at 3.5 GHz
GUID-600E40EE-65BE-424B-8829-8228048100E9-low.gif
3.5 GHz Matching, included PCB and cable losses
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting). Phase DNL spike may occur at any DSA setting.
Figure 7-460 TX Calibrated Differential Phase Error vs DSA Setting and Channel at 3.5 GHz
GUID-74C5295E-DB4E-4B44-82A3-73671A0F280A-low.gif
3.5 GHz Matching, included PCB and cable losses
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 7-462 TX Calibrated Integrated Phase Error vs DSA Setting and Channel at 3.5 GHz
GUID-82431C1A-D29D-47BA-9469-63F350EC4AC2-low.gif
3.5 GHz Matching, 1TX, Calibrated at 25°C
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 7-464 TX Calibrated Differential Gain Error vs DSA Setting and Temperature at 3.5 GHz
GUID-AA7A43EB-3098-4276-99E0-E346A5198656-low.gif
3.5 GHz Matching, 1TX, Calibrated at 25°C
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 7-466 TX Calibrated Integrated Gain Error vs DSA Setting and Temperature at 3.5 GHz
GUID-85B42AED-8106-4672-AECD-2F68055B2C4C-low.gif
3.5 GHz Matching, 1TX, Calibrated at 25°C
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 7-468 TX Calibrated Differential Phase Error vs DSA Setting and Temperature at 3.5 GHz
GUID-4A7DF009-A4F4-4D30-B470-8299C2C597B6-low.gif
3.5 GHz Matching, 1TX, Calibrated at 25°C
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 7-470 TX Calibrated Integrated Phase Error vs DSA Setting and Temperature at 3.5 GHz
GUID-9FC958F7-AD9D-484A-9D38-72B27F047D7F-low.png
A.
fDAC = 12 MSPS, external clock mode, non-interleave mode
Figure 7-472 TX NSD vs Digital Amplitude and Temperature at 3.75 GHz
GUID-689ED1C3-51CB-4ED9-AB39-224D024DD173-low.gif
20-MHz tone spacing, 3.5 GHz Matching, –13 dBFS each tone, included PCB and cable losses
Figure 7-474 TX IMD3 vs DSA Setting at 3.5 GHz
GUID-06ABF28B-64E7-492E-B0EF-51D085DA79DF-low.png
50-MHz tone spacing, external clock mode, non-interleave mode
Figure 7-476 TX IMD3 vs Tone Spacing and Amplitude at 3.75 GHz
GUID-04F110CE-4032-4DF3-869E-9E4C8A5BADE1-low.svg
50-MHz tone spacing, external clock mode, non-interleave mode
Figure 7-478 TX IMD3 vs Digital Amplitude and Temperature at 3.75 GHz
GUID-D5C94930-50F8-4D9C-9D36-9B952C77F042-low.gif
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 7-480 TX 20-MHz LTE Output Spectrum at 3.5 GHz (Band 42)
GUID-6F798CA6-C3DB-488A-BF06-F10F4B57AE56-low.gif
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 7-482 TX 2 carrier 100-MHz NR Output Spectrum at 3.45 GHz and 3.75 GHz
GUID-623ED651-75CF-491B-A8F7-CFE83640BCAE-low.gif
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 7-484 TX 20-MHz LTE alt-ACPR vs DSA Setting at 3.5 GHz
GUID-6A44BAFE-A180-4145-A111-322463806460-low.gif
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 7-486 TX 100-MHz NR alt-ACPR vs DSA Setting at 3.5 GHz
GUID-00275A83-2614-4D21-A108-1C03F729D557-low.gif
3.5 GHz Matching, single carrier 20-MHz BW TM1.1 LTE
Figure 7-488 TX 20-MHz LTE alt-ACPR vs Digital Level at 3.5 GHz
GUID-5ABB90F7-917C-45F9-ABC7-796FB04C1626-low.gif
3.5 GHz Matching, single carrier 100-MHz BW NR TM1.1
Figure 7-490 TX 100-MHz NR alt-ACPR vs Digital Level at 3.5 GHz
GUID-920133B8-9E19-4B1E-9256-551E683FD574-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode, normalized to output power at harmonic frequency. Dip is due to HD3 falling near DC.
Figure 7-492 TX Single Tone HD3 vs Frequency and Digital Level at 3.5 GHz
GUID-F7F353B0-4160-459A-8200-C0DF2D50352D-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode.
Figure 7-494 TX Single Tone (–1 dBFS) Output Spectrum at 3.5 GHz (±300 MHz)
GUID-CB30C7F1-BF1F-4F90-9754-D5FAA2863410-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode.
Figure 7-496 TX Single Tone (–6 dBFS) Output Spectrum at 3.5 GHz (±300 MHz)
GUID-D4ED109B-D291-410C-B20A-8E57E9B9230B-low.gif
Matching at 3.5 GHz, fDAC = 11.79648 GSPS, interleave mode.
Figure 7-498 TX Single Tone (–12 dBFS) Output Spectrum at 3.5 GHz (±300 MHz)
GUID-03FF739F-0BAA-40EF-8AC4-0086835D8990-low.svg
Matching at 3.5 GHz, 50 MHz tone spacing, fDAC = 12 GSPS, non-interleave mode.
Figure 7-500 TX Dual Tone Output Spectrum at 3.75 GHz, -7 dBFS each (±600 MHz)
GUID-0C0302A5-9177-4706-B3BC-FFEBDB013ACB-low.svg
Matching at 3.5 GHz, 50 MHz tone spacing, fDAC = 12 GSPS, non-interleave mode.
Figure 7-502 TX Dual Tone Output Spectrum at 3.75 GHz, -13 dBFS each (±600 MHz)
GUID-FF3F21B8-68AE-4863-9A2B-3BDEB7080D05-low.svg
Matching at 3.5 GHz, 50 MHz tone spacing, fDAC = 12 GSPS, non-interleave mode.
Figure 7-504 TX Dual Tone Output Spectrum at 3.75 GHz, -30 dBFS each (±600 MHz)