Typical values at TA = +25°C with nominal supplies. Default conditions: TX input data rate = 491.52 MSPS, fDAC = 11796.48 MSPS (24x interpolation), interleave mode, 1st Nyquist zone output, PLL clock mode with fREF = 491.52 MHz, AOUT = –1 dBFS, DSA = 0 dB, Sin(x)/x enabled, DSA calibrated, TX Clock Dither Enabled
Including PCB and cable losses, Aout = -0.5d
BFS, DSA = 0, 2.6 GHz matching |
|
Figure 7-78 TX
Full Scale vs RF Frequency at 11796.48 MSPS
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz |
Differential Gain Error = POUT(DSA Setting –
1) – POUT(DSA Setting) + 1 |
Figure 7-80 TX
Uncalibrated Differential Gain Error vs DSA Setting and Channel at 2.6
GHz
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz |
Integrated Gain Error = POUT(DSA Setting) –
POUT(DSA Setting = 0) + (DSA
Setting) |
Figure 7-82 TX
Uncalibrated Integrated Gain Error vs DSA Setting and Channel at 2.6
GHz
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz, channel with the median variation
over DSA setting at 25°C |
Differential Gain Error = POUT(DSA Setting –
1) – POUT(DSA Setting) + 1 |
Figure 7-84 TX
Uncalibrated Differential Gain Error vs DSA Setting and Temperature at 2.6
GHz
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz, channel with the median variation
over DSA setting at 25°C |
Integrated Gain Error = POUT(DSA Setting) –
POUT(DSA Setting = 0) + (DSA
Setting) |
Figure 7-86 TX
Uncalibrated Integrated Gain Error vs DSA Setting and Temperature at 2.6
GHz
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz |
Differential Phase Error = PhaseOUT(DSA
Setting – 1) – PhaseOUT(DSA Setting) |
|
Figure 7-88 TX
Uncalibrated Differential Phase Error vs DSA Setting and Channel at 2.6
GHz
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz |
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA
Setting = 0) |
Figure 7-90 TX
Uncalibrated Integrated Phase Error vs DSA Setting and Channel at 2.6
GHz
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz, channel with the median variation
over DSA setting at 25°C |
Differential Phase Error = PhaseOUT(DSA
Setting – 1) – PhaseOUT(DSA Setting) |
Figure 7-92 TX
Uncalibrated Differential Phase Error vs DSA Setting and Temperature at 2.6
GHz
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz, channel with the medium variation
over DSA setting at 25°C |
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA
Setting = 0) |
Figure 7-94 TX
Uncalibrated Integrated Phase Error vs DSA Setting and Temperature at 2.6
GHz
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz, POUT = –13 dBFS |
Figure 7-96 TX
Output Noise vs Channel and Attenuation at 2.6 GHz
fDAC = 8847.36 MSPS, straight mode,
fCENTER = 2.6 GHz, matching at 2.6 GHz,
–13 dBFS each tone |
Figure 7-98 TX
IMD3 vs Tone Spacing and Channel at 2.6 GHz
fDAC = 8847.36 MSPS, straight mode,
fCENTER = 2.6 GHz, fSPACING =
20 MHz, matching at 2.6 GHz |
Figure 7-100 TX
IMD3 vs Digital Level at 2.6 GHz
Matching at 2.6 GHz, Single tone, fDAC =
11.79648 GSPS, interleave mode, 40-MHz offset |
Figure 7-102 TX
Single Tone Output Noise vs Frequency and Amplitude at 2.6 GHz
Matching at 2.6 GHz, single carrier 20-MHz BW TM1.1
LTE |
Figure 7-104 TX
20-MHz LTE ACPR vs Digital Level at 2.6 GHz
Matching at 2.6 GHz, single carrier 20-MHz BW TM1.1
LTE |
Figure 7-106 TX
20-MHz LTE ACPR vs DSA at 2.6 GHz
Matching at 2.6 GHz, single carrier 20-MHz BW TM1.1
LTE |
Figure 7-108 TX
20-MHz LTE ACPR vs DSA at 2.6 GHz
Matching at 2.6 GHz, single carrier 100-MHz BW TM1.1
NR |
Figure 7-110 TX
100-MHz NR ACPR vs DSA at 2.6 GHz
Matching at 2.6 GHz, fDAC = 11.79648 GSPS,
interleave mode, normalized to output power at harmonic
frequency |
Figure 7-112 TX
HD2 vs Digital Amplitude and Output Frequency at 2.6 GHz
fDAC = 8847.36 MSPS, straight mode, 2.6
GHz matching, includes PCB and cable losses. ILn =
fS/n ± fOUT and is due to
mixing with digital clocks. |
Figure 7-114 TX
Single Tone (–12 dBFS) Output Spectrum at 2.6 GHz
(0-fDAC)
fDAC = 8847.36 MSPS, straight mode, 2.6
GHz matching, includes PCB and cable losses. ILn =
fS/n ± fOUT and is due to
mixing with digital clocks. |
Figure 7-116 TX
Single Tone (–1 dBFS) Output Spectrum at 2.6 GHz (0-fDAC)
fDAC = 8847.36 MSPS, Aout =
-0.5 dBFS, matching 2.6 GHz |
|
|
Figure 7-79 TX
Output Power vs DSA Setting and Channel at 2.6 GHz
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz |
Differential Gain Error = POUT(DSA Setting –
1) – POUT(DSA Setting) + 1 |
Figure 7-81 TX
Calibrated Differential Gain Error vs DSA Setting and Channel at 2.6
GHz
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz |
Integrated Gain Error = POUT(DSA Setting) –
POUT(DSA Setting = 0) + (DSA
Setting) |
|
Figure 7-83 TX
Calibrated Integrated Gain Error vs DSA Setting and Channel at 2.6
GHz
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz, channel with the median variation
over DSA setting at 25°C |
Differential Gain Error = POUT(DSA Setting –
1) – POUT(DSA Setting) + 1 |
Figure 7-85 TX
Calibrated Differential Gain Error vs DSA Setting and Temperature at 2.6
GHz
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz, channel with the median variation
over DSA setting at 25°C |
Integrated Gain Error = POUT(DSA Setting) –
POUT(DSA Setting = 0) + (DSA
Setting) |
Figure 7-87 TX
Calibrated Integrated Gain Error vs DSA Setting and Temperature at 2.6
GHz
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz |
Differential Phase Error = PhaseOUT(DSA
Setting – 1) – PhaseOUT(DSA Setting) |
Phase
DNL spike may occur at any DSA setting. |
Figure 7-89 TX
Calibrated Differential Phase Error vs DSA Setting and Channel at 2.6
GHz
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz |
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA
Setting = 0) |
|
Figure 7-91 TX
Calibrated Integrated Phase Error vs DSA Setting and Channel at 2.6
GHz
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz, channel with the median variation
over DSA setting at 25°C |
Differential Phase Error = PhaseOUT(DSA
Setting – 1) – PhaseOUT(DSA Setting) |
Figure 7-93 TX
Calibrated Differential Phase Error vs DSA Setting and Temperature at 2.6
GHz
fDAC = 8847.36 MSPS, straight mode,
matching at 2.6 GHz, channel with the median variation
over DSA setting at 25°C |
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA
Setting = 0) |
Figure 7-95 TX
Calibrated Integrated Phase Error vs DSA Setting and Temperature at 2.6
GHz
fDAC = 8847.36 MSPS, straight mode,
fCENTER = 2.6 GHz, matching at 2.6 GHz,
–13 dBFS each tone |
Figure 7-97 TX
IMD3 vs DSA Setting at 2.6 GHz
fDAC = 8847.36 MSPS, straight mode,
fCENTER = 2.6 GHz, matching at 2.6 GHz,
–13 dBFS each tone, worst channel. |
Figure 7-99 TX
IMD3 vs Tone Spacing and Temperature at 2.6 GHz
fDAC = 8847.36 MSPS, straight mode,
fCENTER = 2.6 GHz, matching at 2.6 GHz,
–13 dBFS each tone |
Figure 7-101 TX
IMD3 vs Tone Spacing and Temperature
TM1.1,
POUT_RMS = –13 dBFS |
Figure 7-103 TX
20-MHz LTE Output Spectrum at 2.6 GHz (Band 41)
Matching at 2.6 GHz, single carrier 20-MHz BW TM1.1
LTE |
Figure 7-105 TX
20-MHz LTE alt-ACPR vs Digital Level at 2.6 GHz
Matching at 2.6 GHz, single carrier 20-MHz BW TM1.1
LTE |
Figure 7-107 TX
20-MHz LTE alt-ACPR vs DSA at 2.6 GHz
Matching at 2.6 GHz, single carrier 20-MHz BW TM1.1
LTE |
Figure 7-109 TX
20-MHz LTE alt-ACPR vs DSA at 2.6 GHz
Matching at 2.6 GHz, single carrier 100-MHz BW TM1.1
NR |
|
Figure 7-111 TX
100-MHz NR alt-ACPR vs DSA at 2.6 GHz
Matching at 2.6 GHz, fDAC = 11.79648GSPS,
interleave mode, normalized to output power at harmonic
frequency |
Figure 7-113 TX
HD3 vs Digital Amplitude and Output Frequency at 2.6 GHz
fDAC = 8847.36 MSPS, straight mode, 2.6
GHz matching, includes PCB and cable losses. ILn =
fS/n ± fOUT and is due to
mixing with digital clocks. |
Figure 7-115 TX
Single Tone (–6 dBFS) Output Spectrum at 2.6 GHz (0-fDAC)
fDAC = 11796.48 MSPS, interleave mode,
2.6 GHz matching. 40-MHz offset from tone. Output Power
= –13 dBFS. All supplies simultaneously at MIN, TYP, or
MAX voltages. |
Figure 7-117 TX
IMD3 vs Supply Voltage at 2.6 GHz