SBASAN3 may   2023 AFE7951

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Description (continued)
  6. 5Revision History
  7. 6Pin Configuration and Functions
  8. 7Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information AFE79xx
    5. 7.5  Transmitter Electrical Characteristics
    6. 7.6  RF ADC Electrical Characteristics
    7. 7.7  PLL/VCO/Clock Electrical Characteristics
    8. 7.8  Digital Electrical Characteristics
    9. 7.9  Power Supply Electrical Characteristics
    10. 7.10 Timing Requirements
    11. 7.11 Switching Characteristics
    12. 7.12 Typical Characteristics
      1. 7.12.1  TX Typical Characteristics 800 MHz
      2. 7.12.2  TX Typical Characteristics at 1.8 GHz
      3. 7.12.3  TX Typical Characteristics at 2.6 GHz
      4. 7.12.4  TX Typical Characteristics at 3.5 GHz
      5. 7.12.5  TX Typical Characteristics at 4.9 GHz
      6. 7.12.6  TX Typical Characteristics at 8.1 GHz
      7. 7.12.7  TX Typical Characteristics at 9.6 GHz
      8. 7.12.8  RX Typical Characteristics at 800 MHz
      9. 7.12.9  RX Typical Characteristics at 1.75-1.9 GHz
      10. 7.12.10 RX Typical Characteristics at 2.6 GHz
      11. 7.12.11 RX Typical Characteristics at 3.5 GHz
      12. 7.12.12 RX Typical Characteristics at 4.9 GHz
      13. 7.12.13 RX Typical Characteristics at 8.1 GHz
      14. 7.12.14 RX Typical Characteristics at 9.6 GHz
      15. 7.12.15 PLL and Clock Typical Characteristics
  9. 8Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

RX Typical Characteristics at 3.5 GHz

Typical values at TA = +25°C, ADC Sampling Rate = 2949.12 GHz. Default conditions: output sample rate = 491.52 MSPS (decimate by 6), PLL clock mode with fREF = 491.52 MHz, AIN = –3 dBFS, DSA setting = 4 dB.

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With 3.6 GHz matching, normalized to 3.6 GHz
Figure 7-359 RX In-Band Gain Flatness, fIN = 3600 MHz
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With 3.6 GHz matching
Differential Amplitude Error = PIN(DSA Setting – 1) – PIN(DSA Setting) + 1
Figure 7-361 RX Uncalibrated Differential Amplitude Error vs DSA Setting at 3.6 GHz
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With 3.6 GHz matching
Integrated Amplitude Error = PIN(DSA Setting) – PIN(DSA Setting = 0) + (DSA Setting)
Figure 7-363 RX Uncalibrated Integrated Amplitude Error vs DSA Setting at 3.6 GHz
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With 3.6 GHz matching
Differential Phase Error = PhaseIN(DSA Setting – 1) – PhaseIN(DSA Setting)
Figure 7-365 RX Uncalibrated Phase Error vs DSA Setting at 3.6 GHz
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With 3.6 GHz matching
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 7-367 RX Uncalibrated Integrated Phase Error vs DSA Setting at 3.6 GHz
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With 3.6 GHz matching , fIN = 3610 MHz, AIN = –3 dBFS
Figure 7-369 RX Output FFT at 3.6 GHz
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With 3.5 GHz matching, 20-MHz tone spacing
Figure 7-371 RX IMD3 vs Input Level and Temperature at 3.6 GHz
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With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 7-373 RX HD2 vs DSA Setting and Temperature at 3.6 GHz
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With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 7-375 RX HD2 vs Input Level and Temperature at 3.6 GHz
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With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 7-377 RX HD3 vs DSA Setting and Temperature at 3.6 GHz
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With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 7-379 RX HD3 vs Input Level and Temperature at 3.6 GHz
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With 3.5 GHz matching
Figure 7-381 RX In-Band SFDR (±200 MHz) vs Input Level and Channel at 3.6 GHz
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With 3.6 GHz matching, –7 dBFS each tone, 20-MHz tone spacing, all supplies at MIN, TYP, or MAX recommended operating voltages
Figure 7-383 RX IMD3 vs Supply Voltage and Channel at 3.6 GHz
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With 3.6 GHz matching, tone at –20 dBFS, 12.5-MHz offset frequency, all supplies at MIN, TYP, or MAX recommended operating voltages
Figure 7-385 RX Noise Spectral Density vs Supply Voltage and Channel at 3.6 GHz
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With 3.6 GHz matching, normalized to phase at 25°C
Figure 7-360 RX Input Phase vs Temperature at 3.6 GHz
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With 3.6 GHz matching
Differential Amplitude Error = PIN(DSA Setting – 1) – PIN(DSA Setting) + 1
Figure 7-362 RX Calibrated Differential Amplitude Error vs DSA Setting at 3.6 GHz
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With 3.6 GHz matching
Integrated Amplitude Error = PIN(DSA Setting) – PIN(DSA Setting = 0) + (DSA Setting)
Figure 7-364 RX Calibrated Integrated Amplitude Error vs DSA Setting at 3.6 GHz
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With 3.6 GHz matching
Differential Phase Error = PhaseIN(DSA Setting – 1) – PhaseIN(DSA Setting)
Figure 7-366 RX Calibrated Differential Phase Error vs DSA Setting at 3.6 GHz
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With 3.6 GHz matching
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 7-368 RX Calibrated Integrated Phase Error vs DSA Setting at 3.6 GHz
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With 3.5 GHz matching, each tone at –7 dBFS, 20-MHz tone spacing
Figure 7-370 RX IMD3 vs DSA Setting and Temperature at 3.6 GHz
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With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 7-372 RX HD2 vs DSA Setting and Channel at 3.6 GHz
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With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 7-374 RX HD2 vs Input Level and Channel at 3.6 GHz
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With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 7-376 RX HD3 vs DSA Setting and Channel at 3.6 GHz
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With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 7-378 RX HD3 vs Input Level and Channel at 3.6 GHz
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With 3.5 GHz matching, 12.5-MHz offset from tone
Figure 7-380 RX Noise Spectral Density vs Input Level and DSA Setting at 3.6 GHz
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With 3.5 GHz matching
Figure 7-382 RX SFDR Excluding HD2/3 vs DSA Setting and Channel at 3.6 GHz
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With 3.6 GHz matching, –7 dBFS each tone, 20-MHz tone spacing, all supplies at MIN, TYP, or MAX recommended operating voltages
Figure 7-384 RX IMD5 vs Supply Voltage and Channel at 3.6 GHz