SBASAN5 july   2023 AFE7955

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Revision History
  6. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information AFE79xx
    5. 5.5  Transmitter Electrical Characteristics
    6. 5.6  RF ADC Electrical Characteristics
    7. 5.7  PLL/VCO/Clock Electrical Characteristics
    8. 5.8  Digital Electrical Characteristics
    9. 5.9  Power Supply Electrical Characteristics
    10. 5.10 Timing Requirements
    11. 5.11 Switching Characteristics
    12. 5.12 Typical Characteristics
      1. 5.12.1  TX Typical Characteristics 800 MHz
      2. 5.12.2  TX Typical Characteristics at 1.8 GHz
      3. 5.12.3  TX Typical Characteristics at 2.6 GHz
      4. 5.12.4  TX Typical Characteristics at 3.5 GHz
      5. 5.12.5  TX Typical Characteristics at 4.9 GHz
      6. 5.12.6  TX Typical Characteristics at 8.1 GHz
      7. 5.12.7  TX Typical Characteristics at 9.6 GHz
      8. 5.12.8  RX Typical Characteristics at 800 MHz
      9. 5.12.9  RX Typical Characteristics at 1.75-1.9 GHz
      10. 5.12.10 RX Typical Characteristics at 2.6 GHz
      11. 5.12.11 RX Typical Characteristics at 3.5 GHz
      12. 5.12.12 RX Typical Characteristics at 4.9 GHz
      13. 5.12.13 RX Typical Characteristics at 8.1GHz
      14. 5.12.14 RX Typical Characteristics at 9.6 GHz
      15. 5.12.15 PLL and Clock Typical Characteristics
  7. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Support Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  8. 7Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.12.5 TX Typical Characteristics at 4.9 GHz

Typical values at TA = +25°C with nominal supplies. Default conditions: TX input data rate = 491.52 MSPS, fDAC = 11796.48 MSPS (24x interpolation), interleave mode, 1st Nyquist zone output, PLL clock mode with fREF = 491.52 MHz, AOUT = –1 dBFS, DSA = 0 dB, Sin(x)/x enabled, DSA calibrated

GUID-20220907-SS0I-FHWQ-3JN2-4CKJ9Z2VFLFB-low.svg
Excluding PCB and cable losses, Aout = -0.5 dFBS, DSA = 0, 4.9 GHz matching
Figure 5-149 TX Full Scale vs RF Frequency and Channel at 11796.48 MSPS
GUID-20220907-SS0I-SJMH-BFX4-RTF3WQBSNNRQ-low.svg
fDAC = 11796.48 MSPS, Aout = -0.5 dFBS, matching 4.9 GHz
Figure 5-151 TX Output Power vs DSA Setting and Channel at 4.9 GHz
GUID-20220907-SS0I-6N4Q-HN6W-903FNLDFRFRR-low.svg
fDAC = 11796.48 MSPS, interleave mode, matching at 4.9 GHz
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 5-153 TX Calibrated Differential Gain Error vs DSA Setting and Channel at 4.9 GHz
GUID-20220907-SS0I-3FBV-C632-CJRZHWN495QR-low.svg
fDAC = 11796.48 MSPS, interleave mode, matching at 4.9 GHz
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 5-155 TX Calibrated Integrated Gain Error vs DSA Setting and Channel at 4.9 GHz
GUID-A1547F6C-92D7-45B5-9C82-CBFD091F3A8E-low.gif
fDAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 5-157 TX Calibrated Differential Gain Error vs DSA Setting and Temperature at 4.9 GHz
GUID-7A306A86-7BC0-485E-8CAF-15464DD1F8B7-low.gif
fDAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 5-159 TX Calibrated Integrated Gain Error vs DSA Setting and Temperature at 4.9 GHz
GUID-20220907-SS0I-SJBF-F3GN-KVF046QW2V3F-low.svg
fDAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Phase DNL spike may occur at any DSA setting.
Figure 5-161 TX Calibrated Differential Phase Error vs DSA Setting and Channel at 4.9 GHz
GUID-20220907-SS0I-ZFBH-NFVS-S0HSP3Z1ZJR8-low.svg
fDAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 5-163 TX Calibrated Integrated Phase Error vs DSA Setting and Channel at 4.9 GHz
GUID-8DA2597A-634B-4535-ABCB-0DA510913355-low.gif
fDAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 5-165 TX Calibrated Differential Phase Error vs DSA Setting and Temperature at 4.9 GHz
GUID-8B2E38FC-4F80-423D-9E07-A241F87B0122-low.gif
fDAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, channel with the median variation over DSA setting at 25°C
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 5-167 TX Calibrated Integrated Phase Error vs DSA Setting and Temperature at 4.9 GHz
GUID-20220907-SS0I-D1TP-FH1M-XBNHGJ3SQRDR-low.svg
fDAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, fCENTER = 4.9GHz, -13 dBFS each tone
Figure 5-169 TX IMD3 vs DSA Setting at 4.9 GHz
GUID-DE3B4D15-BBA9-418C-A57F-0CAC206E275D-low.gif
fDAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, fCENTER = 4.9 GHz, –13 dBFS each tone, worst channel
Figure 5-171 TX IMD3 vs Tone Spacing and Temperature at 4.9 GHz
GUID-F5A7B257-F081-43F3-AA57-422337E92D70-low.gif
Matching at 4.9 GHz, Single tone, fDAC = 11.79648 GSPS, interleave mode, 40-MHz offset, DSA=0dB
Figure 5-173 TX Single Tone Output Noise vs Frequency and Amplitude at 4.9 GHz
GUID-20220907-SS0I-75NF-FTTW-DH1X92LXDVM4-low.svg
Matching at 4.9 GHz, single carrier 20-MHz BW TM1.1 LTE
Figure 5-175 TX 20-MHz LTE ACPR vs Digital Level at 4.9 GHz
GUID-20220907-SS0I-LVZD-N52C-KB2KGN4VZN9N-low.svg
Matching at 4.9 GHz, single carrier 20-MHz BW TM1.1 LTE
Figure 5-177 TX 20-MHz LTE ACPR vs DSA at 4.9 GHz
GUID-20220907-SS0I-T3HW-HVQS-CGQB353GFN6R-low.svg
Matching at 4.9 GHz, fDAC = 11.79648GSPS, interleave mode, normalized to output power at harmonic frequency
Figure 5-179 TX HD2 vs Digital Amplitude and Output Frequency at 4.9 GHz
GUID-5CABE459-3BEC-4CCC-8BA5-714ACE490C41-low.gif
fDAC = 11796.48 MSPS, interleave mode, 4.9 GHz matching, includes PCB and cable losses. ILn = fS/n ± fOUT.
Figure 5-181 TX Single Tone (–12 dBFS) Output Spectrum at 4.9 GHz (0-fDAC)
GUID-9160C80C-F928-488D-A8F2-BF13B97AECAC-low.gif
fDAC = 11796.48 MSPS, interleave mode, 4.9 GHz matching, includes PCB and cable losses. ILn = fS/n ± fOUT.
Figure 5-183 TX Single Tone (–1 dBFS) Output Spectrum at 4.9 GHz (0-fDAC)
GUID-20220907-SS0I-KRCW-FL97-H1RZZQN9PKF6-low.svg
Excluding PCB and cable losses, Aout = -0.5dFBS, DSA = 0, 4.9 GHz matching
Figure 5-150 TX Full Scale vs RF Frequency and Channel at 5898.24 MSPS, Straight Mode, 2nd Nyquist Zone
GUID-20220907-SS0I-R4T4-SDM6-JXKJQTDZ2N0B-low.svg
fDAC = 11796.48 MSPS, interleave mode, matching at 4.9 GHz
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 5-152 TX Uncalibrated Differential Gain Error vs DSA Setting and Channel at 4.9 GHz
GUID-20220907-SS0I-FD90-V6FF-JCC3GTH76WGL-low.svg
fDAC = 11796.48 MSPS, interleave mode, matching at 4.9 GHz
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 5-154 TX Uncalibrated Integrated Gain Error vs DSA Setting and Channel at 4.9 GHz
GUID-45B6C556-36CD-4A4E-98E7-43D4B2B03FB3-low.gif
fDAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 5-156 TX Uncalibrated Differential Gain Error vs DSA Setting and Temperature at 4.9 GHz
GUID-B0EE21E2-9F0E-49C7-B3DC-40AD1E7F503A-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9 GHz
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 5-158 TX Uncalibrated Integrated Gain Error vs DSA Setting and Temperature at 4.9 GHz
GUID-20220907-SS0I-WNHW-G1TX-12PTZN8Z6GQN-low.svg
fDAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 5-160 TX Uncalibrated Differential Phase Error vs DSA Setting and Channel at 4.9 GHz
GUID-20220907-SS0I-56XB-6QF5-J9NLBZRSZ84P-low.svg
fDAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 5-162 TX Uncalibrated Integrated Phase Error vs DSA Setting and Channel at 4.9 GHz
GUID-91684353-62D7-472F-9651-39B1EF9826DE-low.gif
fDAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 5-164 TX Uncalibrated Differential Phase Error vs DSA Setting and Temperature at 4.9 GHz
GUID-CF1518E7-0FA4-4D80-9FBD-241DFF6BF5A1-low.gif
fDAC = 11796.48MSPS, interleaved mode, matching at 4.9 GHz
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 5-166 TX Uncalibrated Integrated Phase Error vs DSA Setting and Temperature at 4.9 GHz
GUID-20220907-SS0I-J80J-BN68-ZTHRN25MFM4M-low.svg
fDAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, POUT = –13 dBFS
Figure 5-168 TX Output Noise vs Channel and Attenuation at 2.6 GHz
GUID-20220907-SS0I-XTZM-JXXQ-TL7QPLXHVPBL-low.svg
fDAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, fCENTER = 4.9GHz, –13 dBFS each tone
Figure 5-170 TX IMD3 vs Tone Spacing and Channel at 4.9 GHz
GUID-20220907-SS0I-LP1F-Q3W5-VCN4DFB767P5-low.svg
fDAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, fCENTER = 4.9 GHz, fSPACING = 20 MHz
Figure 5-172 TX IMD3 vs Digital Level at 4.9 GHz
GUID-C86990AD-3A00-4968-9C3C-D7F0918A3F18-low.gif
TM1.1, POUT_RMS = –13 dBFS
Figure 5-174 TX 20-MHz LTE Output Spectrum at 4.9 GHz
GUID-20220907-SS0I-8PJ0-9RQK-XNFNGRHPTJJQ-low.svg
Matching at 4.9 GHz, single carrier 20-MHz BW TM1.1 LTE
Figure 5-176 TX 20-MHz LTE alt-ACPR vs Digital Level at 4.9 GHz
GUID-20220907-SS0I-Q5RM-8ZM6-9NF5RSR3V3R8-low.svg
Matching at 4.9 GHz, single carrier 20-MHz BW TM1.1 LTE
Figure 5-178 TX 20-MHz LTE alt-ACPR vs DSA at 4.9 GHz
GUID-20220907-SS0I-QZ0P-1VNH-WJXKSJ001FDB-low.svg
Matching at 4.9 GHz, fDAC = 11.79648 GSPS, interleave mode, normalized to output power at harmonic frequency
Figure 5-180 TX HD3 vs Digital Amplitude and Output Frequency at 4.9 GHz
GUID-2AFF5D86-4BC2-4693-8023-5AB98E2A8257-low.gif
fDAC = 11796.48 MSPS, interleave mode, 4.9 GHz matching, includes PCB and cable losses. ILn = fS/n ± fOUT.
Figure 5-182 TX Single Tone (–6 dBFS) Output Spectrum at 4.9 GHz (0-fDAC)