SBASAN5 july   2023 AFE7955

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Revision History
  6. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information AFE79xx
    5. 5.5  Transmitter Electrical Characteristics
    6. 5.6  RF ADC Electrical Characteristics
    7. 5.7  PLL/VCO/Clock Electrical Characteristics
    8. 5.8  Digital Electrical Characteristics
    9. 5.9  Power Supply Electrical Characteristics
    10. 5.10 Timing Requirements
    11. 5.11 Switching Characteristics
    12. 5.12 Typical Characteristics
      1. 5.12.1  TX Typical Characteristics 800 MHz
      2. 5.12.2  TX Typical Characteristics at 1.8 GHz
      3. 5.12.3  TX Typical Characteristics at 2.6 GHz
      4. 5.12.4  TX Typical Characteristics at 3.5 GHz
      5. 5.12.5  TX Typical Characteristics at 4.9 GHz
      6. 5.12.6  TX Typical Characteristics at 8.1 GHz
      7. 5.12.7  TX Typical Characteristics at 9.6 GHz
      8. 5.12.8  RX Typical Characteristics at 800 MHz
      9. 5.12.9  RX Typical Characteristics at 1.75-1.9 GHz
      10. 5.12.10 RX Typical Characteristics at 2.6 GHz
      11. 5.12.11 RX Typical Characteristics at 3.5 GHz
      12. 5.12.12 RX Typical Characteristics at 4.9 GHz
      13. 5.12.13 RX Typical Characteristics at 8.1GHz
      14. 5.12.14 RX Typical Characteristics at 9.6 GHz
      15. 5.12.15 PLL and Clock Typical Characteristics
  7. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Support Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  8. 7Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.12.3 TX Typical Characteristics at 2.6 GHz

Typical values at TA = +25°C with nominal supplies. Default conditions: TX input data rate = 491.52 MSPS, fDAC = 11796.48 MSPS (24x interpolation), interleave mode, 1st Nyquist zone output, PLL clock mode with fREF = 491.52 MHz, AOUT = –1 dBFS, DSA = 0 dB, Sin(x)/x enabled, DSA calibrated

GUID-2ACA3416-F890-488C-BC1D-2980B18F5322-low.gif
Including PCB and cable losses, Aout = -0.5 dBFS, DSA = 0, 2.6 GHz matching
Figure 5-78 TX Full Scale vs RF Frequency at 11796.48 MSPS
GUID-20220906-SS0I-MHRK-SXX5-X8BRP0QGDPZ0-low.svg
fDAC = 8847.36 MSPS, straight mode, matching at 2.6 GHz
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 5-80 TX Uncalibrated Differential Gain Error vs DSA Setting and Channel at 2.6 GHz
GUID-20220906-SS0I-FZXJ-NXPB-PKRB8XHXXBPG-low.svg
fDAC = 8847.36 MSPS, straight mode, matching at 2.6 GHz
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 5-82 TX Uncalibrated Integrated Gain Error vs DSA Setting and Channel at 2.6 GHz
GUID-40E38BBE-4E00-400D-99A6-880C2C351B9F-low.gif
fDAC = 8847.36MSPS, straight mode, matching at 2.6 GHz, channel with the median variation over DSA setting at 25°C
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 5-84 TX Uncalibrated Differential Gain Error vs DSA Setting and Temperature at 2.6 GHz
GUID-61AEF2DC-EBFA-4512-AAB2-6E24C6FA6145-low.gif
fDAC = 8847.36 MSPS, straight mode, matching at 2.6 GHz, channel with the median variation over DSA setting at 25°C
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 5-86 TX Uncalibrated Integrated Gain Error vs DSA Setting and Temperature at 2.6 GHz
GUID-20220906-SS0I-DB1V-QND3-MCWZ7N5LWT9M-low.svg
fDAC = 8847.36 MSPS, straight mode, matching at 2.6 GHz
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 5-88 TX Uncalibrated Differential Phase Error vs DSA Setting and Channel at 2.6 GHz
GUID-20220906-SS0I-BNVQ-KVHW-MHBZHVFN2BXL-low.svg
fDAC = 8847.36 MSPS, straight mode, matching at 2.6 GHz
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 5-90 TX Uncalibrated Integrated Phase Error vs DSA Setting and Channel at 2.6 GHz
GUID-9CE812E6-3DB9-4B71-B37F-1E38CFD818A9-low.gif
fDAC = 8847.36 MSPS, straight mode, matching at 2.6 GHz, channel with the median variation over DSA setting at 25°C
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 5-92 TX Uncalibrated Differential Phase Error vs DSA Setting and Temperature at 2.6 GHz
GUID-61498CEA-4621-4190-885C-8D6CC16FF8F7-low.gif
fDAC = 8847.36 MSPS, straight mode, matching at 2.6 GHz, channel with the medium variation over DSA setting at 25°C
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 5-94 TX Uncalibrated Integrated Phase Error vs DSA Setting and Temperature at 2.6 GHz
GUID-20220906-SS0I-JCC1-3THX-LZTPP8V79NJR-low.svg
fDAC = 8847.36 MSPS, straight mode, matching at 2.6 GHz, POUT = –13 dBFS
Figure 5-96 TX Output Noise vs Channel and Attenuation at 2.6 GHz
GUID-53939ECA-0BE3-420B-8464-DC254873DB11-low.svg
fDAC = 8847.36 MSPS, straight mode, fCENTER = 2.6 GHz, matching at 2.6 GHz, –13 dBFS each tone
Figure 5-98 TX IMD3 vs Tone Spacing and Channel at 2.6 GHz
GUID-152F5727-73B7-40ED-993B-ED52A0527780-low.svg
fDAC = 8847.36 MSPS, straight mode, fCENTER = 2.6 GHz, fSPACING = 20 MHz, matching at 2.6 GHz
Figure 5-100 TX IMD3 vs Digital Level at 2.6 GHz
GUID-332C7682-8C9D-42FA-933A-BC4A19B02A4C-low.gif
Matching at 2.6 GHz, Single tone, fDAC = 11.79648GSPS, interleave mode, 40-MHz offset
Figure 5-102 TX Single Tone Output Noise vs Frequency and Amplitude at 2.6 GHz
GUID-20220906-SS0I-KCMS-MG1W-MMHG96DPJJ1X-low.svg
Matching at 2.6 GHz, single carrier 20-MHz BW TM1.1 LTE
Figure 5-104 TX 20-MHz LTE ACPR vs Digital Level at 2.6 GHz
GUID-20220906-SS0I-MBN3-HWZ8-3SJCMJXWZRJJ-low.svg
Matching at 2.6 GHz, single carrier 20-MHz BW TM1.1 LTE
Figure 5-106 TX 20-MHz LTE ACPR vs DSA at 2.6 GHz
GUID-20220906-SS0I-2T6X-GC7F-Z4ZP0SB2RHFG-low.svg
Matching at 2.6 GHz, single carrier 20-MHz BW TM1.1 LTE
Figure 5-108 TX 20-MHz LTE ACPR vs DSA at 2.6 GHz
GUID-20220928-SS0I-3HWK-LG2W-JGPNJPDFGRCQ-low.svg
Matching at 2.6 GHz, single carrier 100-MHz BW TM1.1 NR
Figure 5-110 TX 100-MHz NR ACPR vs DSA at 2.6 GHz
GUID-20220906-SS0I-7ZDB-BDQK-MNSVKBNHG900-low.svg
Matching at 2.6 GHz, fDAC = 11.79648 GSPS, interleave mode, normalized to output power at harmonic frequency
Figure 5-112 TX HD2 vs Digital Amplitude and Output Frequency at 2.6 GHz
GUID-17F0DDDC-B9B5-4BDE-951F-D25B6B2A1640-low.gif
fDAC = 8847.36 MSPS, straight mode, 2.6 GHz matching, includes PCB and cable losses. ILn = fS/n ± fOUT and is due to mixing with digital clocks.
Figure 5-114 TX Single Tone (–12 dBFS) Output Spectrum at 2.6 GHz (0-fDAC)
GUID-9B280FA3-4AC8-4957-B5F1-690F2A14129B-low.gif
fDAC = 8847.36MSPS, straight mode, 2.6 GHz matching, includes PCB and cable losses. ILn = fS/n ± fOUT and is due to mixing with digital clocks.
Figure 5-116 TX Single Tone (–1 dBFS) Output Spectrum at 2.6 GHz (0-fDAC)
GUID-20220906-SS0I-FLV8-8LTH-VGNVPJJFDZJK-low.svg
fDAC = 8847.36 MSPS, Aout = -0.5 dBFS, matching 2.6 GHz
Figure 5-79 TX Output Power vs DSA Setting and Channel at 2.6 GHz
GUID-20220906-SS0I-4JZ6-NDHR-ZHSZVGTPZ0KG-low.svg
fDAC = 8847.36 MSPS, straight mode, matching at 2.6 GHz
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 5-81 TX Calibrated Differential Gain Error vs DSA Setting and Channel at 2.6 GHz
GUID-20220906-SS0I-GFVC-ZDVL-LHBTNMNDRPTW-low.svg
fDAC = 8847.36 MSPS, straight mode, matching at 2.6 GHz
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 5-83 TX Calibrated Integrated Gain Error vs DSA Setting and Channel at 2.6 GHz
GUID-4FA7DE4E-F9C6-4D3A-97FD-0D8896A63A13-low.gif
fDAC = 8847.36 MSPS, straight mode, matching at 2.6 GHz, channel with the median variation over DSA setting at 25°C
Differential Gain Error = POUT(DSA Setting – 1) – POUT(DSA Setting) + 1
Figure 5-85 TX Calibrated Differential Gain Error vs DSA Setting and Temperature at 2.6 GHz
GUID-CCD4DF49-84A9-4B40-8AFE-CABA9B77A65B-low.gif
fDAC = 8847.36 MSPS, straight mode, matching at 2.6 GHz, channel with the median variation over DSA setting at 25°C
Integrated Gain Error = POUT(DSA Setting) – POUT(DSA Setting = 0) + (DSA Setting)
Figure 5-87 TX Calibrated Integrated Gain Error vs DSA Setting and Temperature at 2.6 GHz
GUID-20220906-SS0I-HH0L-VR5T-ZH7PPTHTJ127-low.svg
fDAC = 8847.36 MSPS, straight mode, matching at 2.6 GHz
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Phase DNL spike may occur at any DSA setting.
Figure 5-89 TX Calibrated Differential Phase Error vs DSA Setting and Channel at 2.6 GHz
GUID-20220906-SS0I-H1VF-MZWF-Q5XPL4B5BTXC-low.svg
fDAC = 8847.36 MSPS, straight mode, matching at 2.6 GHz
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 5-91 TX Calibrated Integrated Phase Error vs DSA Setting and Channel at 2.6 GHz
GUID-476BC4B2-1B63-4654-86A1-87C91960E058-low.gif
fDAC = 8847.36 MSPS, straight mode, matching at 2.6 GHz, channel with the median variation over DSA setting at 25°C
Differential Phase Error = PhaseOUT(DSA Setting – 1) – PhaseOUT(DSA Setting)
Figure 5-93 TX Calibrated Differential Phase Error vs DSA Setting and Temperature at 2.6 GHz
GUID-D1044E17-70DE-4A6A-898C-E8228AC05C87-low.gif
fDAC = 8847.36 MSPS, straight mode, matching at 2.6 GHz, channel with the median variation over DSA setting at 25°C
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 5-95 TX Calibrated Integrated Phase Error vs DSA Setting and Temperature at 2.6 GHz
GUID-20220906-SS0I-FMT0-Q9LD-VXLTZZQPPW4X-low.svg
fDAC = 8847.36 MSPS, straight mode, fCENTER = 2.6 GHz, matching at 2.6 GHz, –13 dBFS each tone
Figure 5-97 TX IMD3 vs DSA Setting at 2.6 GHz
GUID-0077E993-1164-4E80-B8EA-21A374061552-low.gif
fDAC = 8847.36 MSPS, straight mode, fCENTER = 2.6 GHz, matching at 2.6 GHz, –13 dBFS each tone, worst channel.
Figure 5-99 TX IMD3 vs Tone Spacing and Temperature at 2.6 GHz
GUID-13CB6452-B19D-4BD3-B0C8-C045F621E284-low.gif
fDAC = 8847.36 MSPS, straight mode, fCENTER = 2.6 GHz, matching at 2.6 GHz, –13 dBFS each tone
Figure 5-101 TX IMD3 vs Tone Spacing and Temperature
GUID-3CB55EA0-A0A1-4BE9-AFF4-1D868F76D2A4-low.gif
TM1.1, POUT_RMS = –13 dBFS
Figure 5-103 TX 20-MHz LTE Output Spectrum at 2.6 GHz (Band 41)
GUID-20220906-SS0I-2RLQ-BVGM-G5V2DPBRFGHD-low.svg
Matching at 2.6 GHz, single carrier 20-MHz BW TM1.1 LTE
Figure 5-105 TX 20-MHz LTE alt-ACPR vs Digital Level at 2.6 GHz
GUID-20220906-SS0I-52ZC-CCR2-QL4JMBQRS18C-low.svg
Matching at 2.6 GHz, single carrier 20-MHz BW TM1.1 LTE
Figure 5-107 TX 20-MHz LTE alt-ACPR vs DSA at 2.6 GHz
GUID-20220906-SS0I-XXC2-ZDZB-MTKRGHWHVLSC-low.svg
Matching at 2.6 GHz, single carrier 20-MHz BW TM1.1 LTE
Figure 5-109 TX 20-MHz LTE alt-ACPR vs DSA at 2.6 GHz
GUID-20220928-SS0I-PP4H-7M0S-XS5XC4CBXXSG-low.svg
Matching at 2.6 GHz, single carrier 100-MHz BW TM1.1 NR
Figure 5-111 TX 100-MHz NR alt-ACPR vs DSA at 2.6 GHz
GUID-20220906-SS0I-RKRP-WZX2-5BSLLHTW1BJX-low.svg
Matching at 2.6 GHz, fDAC = 11.79648 GSPS, interleave mode, normalized to output power at harmonic frequency
Figure 5-113 TX HD3 vs Digital Amplitude and Output Frequency at 2.6 GHz
GUID-44836426-7CB2-485E-95F2-B7831F125E6E-low.gif
fDAC = 8847.36 MSPS, straight mode, 2.6 GHz matching, includes PCB and cable losses. ILn = fS/n ± fOUT and is due to mixing with digital clocks.
Figure 5-115 TX Single Tone (–6 dBFS) Output Spectrum at 2.6 GHz (0-fDAC)
GUID-DF68E634-F144-4C57-BCD6-1EEAABB1A6C3-low.gif
fDAC = 11796.48 MSPS, interleave mode, 2.6 GHz matching. 40-MHz offset from tone. Output Power = –13 dBFS. All supplies simultaneously at MIN, TYP, or MAX voltages.
Figure 5-117 TX IMD3 vs Supply Voltage at 2.6 GHz