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  • ALM2402-Q1 Dual Op-amp with High Current Output

    • SLOS912D February   2015  – July 2015 ALM2402-Q1

      PRODUCTION DATA.  

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  • ALM2402-Q1 Dual Op-amp with High Current Output
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Thermal Information
    3. 7.3 ESD Ratings
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Electrical Characteristics
    6. 7.6 AC Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 OTF/SH_DN
      2. 8.3.2 Supply Voltage
      3. 8.3.3 Current Limit and Short Circuit Protection
      4. 8.3.4 Input Common Mode Range and Overvoltage Clamps
      5. 8.3.5 Thermal Shutdown
      6. 8.3.6 Output Stage
      7. 8.3.7 EMI Susceptibility and Input Filtering
    4. 8.4 Device Functional Modes
      1. 8.4.1 Open Loop and Closed Loop
      2. 8.4.2 Shutdown
  9. 9 Applications and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Capacitive Load and Stability
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Resolver Excitation Input (Opamp Output)
          1. 9.2.2.1.1 Excitation Voltage
          2. 9.2.2.1.2 Excitation Frequency
          3. 9.2.2.1.3 Excitation Impedance
        2. 9.2.2.2 Resolver Output
        3. 9.2.2.3 Power Dissipation and Thermal Reliability
          1. 9.2.2.3.1 Improving Package Thermal Performance
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
  14. IMPORTANT NOTICE

Package Options

Mechanical Data (Package|Pins)
  • PWP|14
    • MPDS370A
  • DRR|12
    • MPSS085A
Thermal pad, mechanical data (Package|Pins)
  • PWP|14
    • PPTD332B
Orderable Information
  • slos912d_oa
  • slos912d_pm
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    • Full reading width
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    • Expanded reading width
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DATA SHEET

ALM2402-Q1 Dual Op-amp with High Current Output

1 Features

  • High Output Current Drive: 400 mA Continuous (Per Channel)
    • Op-amp With Discrete Power Boost Buffer Replacement
  • Wide Supply Range for Both Supplies (up to 16 V)
  • Over Temperature Shutdown
  • Current Limit
  • Shutdown Pin for Low Iq Applications
  • Stable with Large Capacitive Loads (up to 3 µF)
  • Zero Crossover Distortion
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM Classification Level H2 (DRR)
    • Device CDM Classification Level C5 (DRR)
  • Low Offset Voltage: 1 mV (typ)
  • Internal RF/EMI Filter
  • Available in 3.00 mm x 3.00 mm 12 Pin WSON (DRR) With Thermal Pad

2 Applications

  • Large Capacitive Loads
    • Cable Shields
    • Reference Buffers
    • Power-FET/IGBT Gates
    • Super Caps
  • Tracking LDO
  • Inductive Loads
    • Resolvers
    • Bipolar DC & Servo Motors
    • Solenoids & Valves

3 Description

The ALM2402-Q1 is a dual high voltage, high current op-amp with protection features that are optimal for driving low impedances and/or high ESR capacitive loads. ALM2402-Q1 operates with single or split power supplies from 5.0 V to 16 V and can output up to 400 mA DC.

Each op-amp includes over-temperature flag/shut-down. It also includes separate supply pins for each output stage that allow the user to apply a lower voltage on the output to limit the Voh and henceforth the on-chip power dissipation.

The ALM2402 is packaged in a 12 pin leadless DRR package and 14 pin leaded HTSSOP (preview). Both include a thermally conductive power pad that facilitates heat sinking. The very low thermal impedance of these packages enable optimal current drive with minimal die temperature increase. Providing customers with the ability to drive high currents in harsh temperature conditions. Maximum power dissipation can be determined in the figure below.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
ALM2402-Q1 SON (12) 3.00 mm x 3.00 mm
HTSSOP (14) 5.00 mm x 4.40 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

4 Simplified Schematic

ALM2402-Q1 simp_sch_slos912.gif

Maximum Power Dissipation vs Temperature

ALM2402-Q1 Pd_plot.gif

5 Revision History

Changes from C Revision (June 2015) to D Revision

  • Added package corresponding to ESD levelGo
  • Removed HTSSOP preview statusGo
  • Added thermal metrics for PWP Go
  • Added CDM value for PWP Go

Changes from B Revision (May 2015) to C Revision

  • Changed DRR to industry standard SON. Go
  • Changed document wording to remove the word "guarantee." Go
  • Updated Resolver Application Graphic. Go

Changes from A Revision (April 2015) to B Revision

  • Fixed HBM Classification typo from "Level 2" to "Level H2"Go

Changes from * Revision (February 2015) to A Revision

  • Initial release of full version document.Go

6 Pin Configuration and Functions

ALM2402-Q1 po_slos912.gif
It is recommended to connect the Exposed Pad to ground for best thermal performance. Must not be connected to any other pin than ground. However, it can be left floating.

Pin Functions

PIN I/O DESCRIPTION
NAME DDR PWP
NO. NO.
IN(X)+ 2, 4 2, 4 Input non-inverting op amp input terminal
IN(X)- 1, 5 1, 5 Input inverting op amp input terminal
OUT(X) 11, 7 13, 9 Output Op amp output
OTF/SH_DN 3 3 Input/output Over temperature flag and Shutdown (see Table 1 for truth table)
VCC_O(X) 8, 10 10, 12 Input Output stage supply pin
VCC 9 11 Input Gain stage supply pin
GND 6, 12 14 Input Ground pin (Both ground pins must be used and connected together on board)
NC N/A 7, 8 N/A No Internal Connection (do no connect)

7 Specifications

7.1 Absolute Maximum Ratings(1)

at 25°C free-air temperature (unless otherwise noted)
MIN MAX UNIT
VCC Supply Voltage -0.3 18 V
VCC_(OX) Output supply voltage(2) -0.3 18 V
VOUT(X) Opamp voltage(2) -0.3 18 V
VIN(X) Positive and negative input to GND voltage (2) -0.3 18 V
IOTF Over Temperature Flag pin maximum Current 20 mA
VOTF Over Temperature Flag pin maximum Voltage 0 7 V
ISC Continuous output short current per opamp Internally Limited mA
Figure 6
TA Operating free-air temperature range –40 125 °C
TJ Operating virtual junction temperature(3) -40 150 °C
Tstg Storage temperature range –65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the GND/substrate terminal, unless otherwise noted.
(3) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.

7.2 Thermal Information

THERMAL METRIC(1) ALM2402Q1 UNIT
DRR (SON) PWP (HTSSOP)
12 Pins 14 Pins
θJA Junction-to-ambient thermal resistance 39.2 46.5 °C/W
θJCtop Junction-to-case (top) thermal resistance 34.5 33.0 °C/W
θJB Junction-to-board thermal resistance 15.0 27.6 °C/W
ψJT Junction-to-top characterization parameter 0.3 1.5 °C/W
ψJB Junction-to-board characterization parameter 15.2 27.4 °C/W
θJCbot Junction-to-case (bottom) thermal resistance 4.2 2.2 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.3 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) DRR ±750
PWP ±250
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250-V CDM is possible with the necessary precautions.

7.4 Recommended Operating Conditions

TA= 25°C
MIN MAX UNIT
TJ Junction Temperature -40 150 °C
TA Ambient Temperature -40 125
IOUT(1) Continuous output current (sourcing) 400 mA
Continuous output current (sinking) 400
VIH_OTF OTF input high voltage (Opamp "On" or full operation state) 1.0 V
VIL_OTF OTF input low voltage (Opamp "Off" or shutdown state) 0.35
VIN(X) Positive and negative input to GND voltage 0 7
VOTF Over Temperature Flag pin maximum Voltage 2 5
VCC Input Vcc 4.5 16
VCC_O(X) Output Vcc 3 16
(1) Current Limit must taken into consideration when choosing maximum output current

7.5 Electrical Characteristics

VOTF = 5 V, VCC = VCC_O1 = VCC_O2 = 5 V and 12 V; TA = –40°C to 125°C; Typical Values at TA = 25°C, unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIO Input Offset Voltage (2) VICM = Vcc/2, RL = 10 kΩ 1 15 mV
IIB Input Bias Current (2) VICM = Vcc/2 1.5 100 nA
IIOS Input Offset Current (2) VICM = Vcc/2 30 nA
VICM Input Common Mode Range (2) VCC = 5.0 0.2 Vcc-1.2 V
VCC = 12.0 V 0.2 7
ICC Total Supply Current (both amplifiers)(2) IO = 0 A 5 15 mA
VOTF = 0V 0.5(4)
Vo Positive Output Swing VCC = VCC_O(X) = 5.0 V; VICM = Vcc/2; VID = 100 mV ISINK = 200 mA 4.7 4.87 V
ISINK = 100 mA 4.85 4.94
Negative Output Swing VCC = VCC_O(X) = 5.0 V; VICM = Vcc/2; VID = 100 mV ISOURCE = 200 mA 200 425 mV
ISOURCE = 100 mA 100 200
OTF Over Temp. Fault and Shutdown(1) 157 165 175 °C
VOL_OTF Over Temp. Fault low voltage Rpullup = 2.5 kΩ, Vpullup = 5.0 V 450 mV
ILIMIT Short to Supply Limit (low-side limit)(3) 550 mA
Short to Ground Limit (high-side limit)(2)(3) 750
PSRR Power Supply Rejection Ratio(2) VCC = 5.0 V to 12 V, RL = 10 kΩ, VICM = Vcc/2, VO = Vcc/2 65 90 dB
CMRR Common Mode Rejection Ratio(2) VICM = VICM(min) to VICM(max), RL = 10 kΩ, VO = Vcc/2 45 90 dB
AVD DC Voltage Gain(2) RL = 10 kΩ, VICM = Vcc/2, VO = 0.3 V to Vcc-1.5 70 90 dB
(1) Please see refer to Absolute Maximum Ratings table for maximum junction temperature recommendations.
(2) Tested and verified in closed loop negative feedback configuration.
(3) This is the static current limit. It can be temporarily higher in applications due to internal propagation delay.
(4) Verified by design.

7.6 AC Characteristics

TJ= –40°C to 125°C; Typical Values at TA = TJ = 25°C; VCC = VCC_O1 = VCC_O2 = 5.0 V and 12 V; VICM=VCC/2
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
GBW Gain Bandwidth CL=15 pF RL=10 kΩ 600 KHz
PM Phase Margin CL=200 nF RL= 50 Ω 50 °
GM Gain Margin CL=200 nF RL= 50 Ω 17 dB
SR Slew Rate G = +1; CL=50 pF; 3 V step 0.17 V/us
THD + N Total Harmonic Distortion + Noise AV = 2 V/V, RL = 100 Ω, Vo = 8 Vpp, Vcc = 12 V, F = 1 kHz, VICM = Vcc/2 -80 dB
en Input Voltage Noise Density Vcc = 5 V, F = 1kHz, VICM = Vcc/2 110 nV/√HZ

7.7 Typical Characteristics

TA= 25°C and VCC = VCC_O(X)
ALM2402-Q1 Voh_5V.gif
Figure 1. VOH at VCC = 5 V
ALM2402-Q1 Voh_3V.gif
Figure 3. VOH at VCC = 3.3 V
ALM2402-Q1 I_s2s_ilimit.gif
Figure 5. Short to Supply Current Limit vs. Temperature
ALM2402-Q1 Vforward.gif
Figure 7. PMOS (High Side) and NMOS (Low Side) Output Diode Forward Voltage
ALM2402-Q1 GP_50pF.gif
VCC = 5.0 V
Figure 9. Gain and Phase (CL = 50 pF and RL = 10 kΩ)
ALM2402-Q1 CMRR.gif
Figure 11. CMRR vs. Frequency
ALM2402-Q1 ICC_plot.gif
Figure 13. ICC vs. Temperature
ALM2402-Q1 SR.gif
VCC = 5.0 V
Figure 15. Slew Rate
ALM2402-Q1 THD_12V_8Vpp.gif
Av = 2V/V Vo = 8Vpp
Figure 17. THD + Noise (Vcc = 12 V)
ALM2402-Q1 VIOS_plot.gif
Vcm = Vcc/2
Figure 19. Input Offset vs. Temperature
ALM2402-Q1 noise.gif
Figure 21. . Input Voltage Noise Spectral Density vs. Frequency
ALM2402-Q1 Vol_5V.gif
Figure 2. VOL at VCC = 5 V
ALM2402-Q1 Vol_5V.gif
Figure 4. VOL at VCC = 3.3 V
ALM2402-Q1 I_sg_limit.gif
Figure 6. Short to Groung Current Limit vs. Temperature
ALM2402-Q1 GP_200nF.gif
VCC = 5.0 V
Figure 8. Gain and Phase (CL = 200 nF and RL = 50 Ω)
ALM2402-Q1 outZ.gif
Figure 10. Output Impedance vs. Frequency
ALM2402-Q1 PSRR.gif
Figure 12. PSRR vs. Frequency
ALM2402-Q1 IIB_plot.gif
Figure 14. Input Bias Current vs. Temperature
ALM2402-Q1 SR_TEMP_plot.gif
VCC =5.0 V
Figure 16. Slew Rate vs. Temperature
ALM2402-Q1 THD_5V_1Vpp.gif
Av = 1V/V Vo = 1Vpp
Figure 18. THD + Noise (Vcc = 5 V)
ALM2402-Q1 vio_hist.gif
Vcc =12 V and 5 V Vcm = Vcc/2
Figure 20. Offset Voltage Production Distribution
ALM2402-Q1 EMIRR.gif
Figure 22. EMIRR vs. Power

 
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