SPRS637E February   2010  – June 2014 AM1707

PRODUCTION DATA.  

  1. 1 AM1707 ARM Microprocessor
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
  2. 2Revision History
  3. 3Device Overview
    1. 3.1 Device Characteristics
    2. 3.2 Device Compatibility
    3. 3.3 ARM Subsystem
      1. 3.3.1 ARM926EJ-S RISC CPU
      2. 3.3.2 CP15
      3. 3.3.3 MMU
      4. 3.3.4 Caches and Write Buffer
      5. 3.3.5 Advanced High-Performance Bus (AHB)
      6. 3.3.6 Embedded Trace Macrocell (ETM) and Embedded Trace Buffer (ETB)
      7. 3.3.7 ARM Memory Mapping
    4. 3.4 Memory Map Summary
    5. 3.5 Pin Assignments
      1. 3.5.1 Pin Map (Bottom View)
    6. 3.6 Terminal Functions
      1. 3.6.1  Device Reset and JTAG
      2. 3.6.2  High-Frequency Oscillator and PLL
      3. 3.6.3  Real-Time Clock and 32-kHz Oscillator
      4. 3.6.4  External Memory Interface A (ASYNC, SDRAM)
      5. 3.6.5  External Memory Interface B (SDRAM only)
      6. 3.6.6  Serial Peripheral Interface Modules (SPI0, SPI1)
      7. 3.6.7  Enhanced Capture/Auxiliary PWM Modules (eCAP0, eCAP1, eCAP2)
      8. 3.6.8  Enhanced Pulse Width Modulators (eHRPWM0, eHRPWM1, eHRPWM2)
      9. 3.6.9  Enhanced Quadrature Encoder Pulse Module (eQEP)
      10. 3.6.10 Boot
      11. 3.6.11 Universal Asynchronous Receiver/Transmitters (UART0, UART1, UART2)
      12. 3.6.12 Inter-Integrated Circuit Modules (I2C0, I2C1)
      13. 3.6.13 Timers
      14. 3.6.14 Universal Host-Port Interface (UHPI)
      15. 3.6.15 Multichannel Audio Serial Ports (McASP0, McASP1, McASP2)
      16. 3.6.16 Universal Serial Bus Modules (USB0, USB1)
      17. 3.6.17 Ethernet Media Access Controller (EMAC)
      18. 3.6.18 Multimedia Card/Secure Digital (MMC/SD)
      19. 3.6.19 Liquid Crystal Display Controller (LCD)
      20. 3.6.20 Reserved and No Connect
      21. 3.6.21 Supply and Ground
      22. 3.6.22 Unused USB0 (USB2.0) and USB1 (USB1.1) Pin Configurations
  4. 4Device Configuration
    1. 4.1 Boot Modes
    2. 4.2 SYSCFG Module
    3. 4.3 Pullup/Pulldown Resistors
    4. 4.4 Absolute Maximum Ratings Over Operating Junction Temperature Range (Unless Otherwise Noted)
    5. 4.5 Handling Ratings
    6. 4.6 Recommended Operating Conditions
    7. 4.7 Notes on Recommended Power-On Hours (POH)
    8. 4.8 Electrical Characteristics Over Recommended Ranges of Supply Voltage and Operating Junction Temperature (Unless Otherwise Noted)
  5. 5Peripheral Information and Electrical Specifications
    1. 5.1  Parameter Information
      1. 5.1.1 Parameter Information Device-Specific Information
        1. 5.1.1.1 Signal Transition Levels
    2. 5.2  Recommended Clock and Control Signal Transition Behavior
    3. 5.3  Power Supplies
      1. 5.3.1 Power-on Sequence
      2. 5.3.2 Power-off Sequence
    4. 5.4  Reset
      1. 5.4.1 Power-On Reset (POR)
      2. 5.4.2 Warm Reset
      3. 5.4.3 Reset Electrical Data Timings
    5. 5.5  Crystal Oscillator or External Clock Input
    6. 5.6  Clock PLLs
      1. 5.6.1 PLL Device-Specific Information
      2. 5.6.2 Device Clock Generation
      3. 5.6.3 PLL Controller 0 Registers
    7. 5.7  Interrupts
      1. 5.7.1 ARM CPU Interrupts
        1. 5.7.1.1 ARM Interrupt Controller (AINTC) Interrupt Signal Hierarchy
        2. 5.7.1.2 AINTC Hardware Vector Generation
        3. 5.7.1.3 AINTC Hardware Interrupt Nesting Support
        4. 5.7.1.4 AINTC System Interrupt Assignments on the device
        5. 5.7.1.5 AINTC Memory Map
    8. 5.8  General-Purpose Input/Output (GPIO)
      1. 5.8.1 GPIO Register Description(s)
      2. 5.8.2 GPIO Peripheral Input/Output Electrical Data/Timing
      3. 5.8.3 GPIO Peripheral External Interrupts Electrical Data/Timing
    9. 5.9  EDMA
    10. 5.10 External Memory Interface A (EMIFA)
      1. 5.10.1 EMIFA Asynchronous Memory Support
      2. 5.10.2 EMIFA Synchronous DRAM Memory Support
      3. 5.10.3 EMIFA SDRAM Loading Limitations
      4. 5.10.4 EMIFA Connection Examples
      5. 5.10.5 External Memory Interface A (EMIFA) Registers
      6. 5.10.6 EMIFA Electrical Data/Timing
    11. 5.11 External Memory Interface B (EMIFB)
      1. 5.11.1 EMIFB SDRAM Loading Limitations
      2. 5.11.2 Interfacing to SDRAM
      3. 5.11.3 EMIFB Registers
      4. 5.11.4 EMIFB Electrical Data/Timing
    12. 5.12 Memory Protection Units
    13. 5.13 MMC / SD / SDIO (MMCSD)
      1. 5.13.1 MMCSD Peripheral Description
      2. 5.13.2 MMCSD Peripheral Register Description(s)
      3. 5.13.3 MMC/SD Electrical Data/Timing
    14. 5.14 Ethernet Media Access Controller (EMAC)
      1. 5.14.1 EMAC Peripheral Register Description(s)
    15. 5.15 Management Data Input/Output (MDIO)
      1. 5.15.1 MDIO Registers
      2. 5.15.2 Management Data Input/Output (MDIO) Electrical Data/Timing
    16. 5.16 Multichannel Audio Serial Ports (McASP0, McASP1, and McASP2)
      1. 5.16.1 McASP Peripheral Registers Description(s)
      2. 5.16.2 McASP Electrical Data/Timing
        1. 5.16.2.1 Multichannel Audio Serial Port 0 (McASP0) Timing
        2. 5.16.2.2 Multichannel Audio Serial Port 1 (McASP1) Timing
        3. 5.16.2.3 Multichannel Audio Serial Port 2 (McASP2) Timing
    17. 5.17 Serial Peripheral Interface Ports (SPI0, SPI1)
      1. 5.17.1 SPI Peripheral Registers Description(s)
      2. 5.17.2 SPI Electrical Data/Timing
        1. 5.17.2.1 Serial Peripheral Interface (SPI) Timing
    18. 5.18 Enhanced Capture (eCAP) Peripheral
    19. 5.19 Enhanced Quadrature Encoder (eQEP) Peripheral
    20. 5.20 Enhanced High-Resolution Pulse-Width Modulator (eHRPWM)
      1. 5.20.1 Enhanced Pulse Width Modulator (eHRPWM) Timing
      2. 5.20.2 Trip-Zone Input Timing
    21. 5.21 LCD Controller
      1. 5.21.1 LCD Interface Display Driver (LIDD Mode)
      2. 5.21.2 LCD Raster Mode
    22. 5.22 Timers
      1. 5.22.1 Timer Electrical Data/Timing
    23. 5.23 Inter-Integrated Circuit Serial Ports (I2C0, I2C1)
      1. 5.23.1 I2C Device-Specific Information
      2. 5.23.2 I2C Peripheral Registers Description(s)
      3. 5.23.3 I2C Electrical Data/Timing
        1. 5.23.3.1 Inter-Integrated Circuit (I2C) Timing
    24. 5.24 Universal Asynchronous Receiver/Transmitter (UART)
      1. 5.24.1 UART Peripheral Registers Description(s)
      2. 5.24.2 UART Electrical Data/Timing
    25. 5.25 USB1 Host Controller Registers (USB1.1 OHCI)
      1. 5.25.1 USB1 Unused Signal Configuration
    26. 5.26 USB0 OTG (USB2.0 OTG)
      1. 5.26.1 USB2.0 (USB0) Electrical Data/Timing
      2. 5.26.2 USB0 Unused Signal Configuration
    27. 5.27 Host-Port Interface (UHPI)
      1. 5.27.1 HPI Device-Specific Information
      2. 5.27.2 HPI Peripheral Register Description(s)
      3. 5.27.3 HPI Electrical Data/Timing
    28. 5.28 Power and Sleep Controller (PSC)
      1. 5.28.1 Power Domain and Module Topology
        1. 5.28.1.1 Power Domain States
        2. 5.28.1.2 Module States
    29. 5.29 Programmable Real-Time Unit Subsystem (PRUSS)
      1. 5.29.1 PRUSS Register Descriptions
    30. 5.30 Emulation Logic
      1. 5.30.1 JTAG Port Description
      2. 5.30.2 Scan Chain Configuration Parameters
      3. 5.30.3 Initial Scan Chain Configuration
        1. 5.30.3.1 Adding TAPS to the Scan Chain
      4. 5.30.4 JTAG 1149.1 Boundary Scan Considerations
    31. 5.31 IEEE 1149.1 JTAG
      1. 5.31.1 JTAG Peripheral Register Description(s) - JTAG ID Register (DEVIDR0)
      2. 5.31.2 JTAG Test-Port Electrical Data/Timing
    32. 5.32 Real Time Clock (RTC)
      1. 5.32.1 Clock Source
      2. 5.32.2 Registers
  6. 6Device and Documentation Support
    1. 6.1 Device Support
      1. 6.1.1 Development Support
      2. 6.1.2 Device and Development-Support Tool Nomenclature
    2. 6.2 Documentation Support
    3. 6.3 Community Resources
    4. 6.4 Trademarks
    5. 6.5 Electrostatic Discharge Caution
    6. 6.6 Glossary
  7. 7Mechanical Packaging and Orderable Information
    1. 7.1 Thermal Data for ZKB
    2. 7.2 Packaging Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • ZKB|256
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Device and Documentation Support

6.1 Device Support

6.1.1 Development Support

TI offers an extensive line of development tools for the device platform, including tools to evaluate the performance of the processors, generate code, develop algorithm implementations, and fully integrate and debug software and hardware modules. The tool's support documentation is electronically available within the Code Composer Studio™ Integrated Development Environment (IDE).

The following products support development of the device applications:

Software Development Tools:

Code Composer Studio™ Integrated Development Environment (IDE): including Editor

C/C++/Assembly Code Generation, and Debug plus additional development tools

Hardware Development Tools:

Extended Development System (XDS™) Emulator

For a complete listing of development-support tools for the device, visit the Texas Instruments web site on the Worldwide Web at www.ti.com uniform resource locator (URL). For information on pricing and availability, contact the nearest TI field sales office or authorized distributor.

6.1.2 Device and Development-Support Tool Nomenclature

To designate the stages in the product development cycle, TI assigns prefixes to the part numbers of all AM1xxx processors and support tools. Each commercial AM1xxx platform member has one of three prefixes: X, P, or null (no prefix). Texas Instruments recommends two of three possible prefix designators for its support tools: TMDX and TMDS. These prefixes represent evolutionary stages of product development from engineering prototypes (TMDX) through fully qualified production devices/tools (TMDS).

Device development evolutionary flow:

    X Experimental device that is not necessarily representative of the final device's electrical specifications.
    P Final silicon die that conforms to the device's electrical specifications but has not completed quality and reliability verification.
    NULL Fully-qualified production device.

Support tool development evolutionary flow:

    TMDX Development-support product that has not yet completed Texas Instruments internal qualification testing.
    TMDS Fully qualified development-support product.

X and P devices and TMDX development-support tools are shipped against the following disclaimer:

"Developmental product is intended for internal evaluation purposes."

NULL devices and TMDS development-support tools have been characterized fully, and the quality and reliability of the device have been demonstrated fully. TI's standard warranty applies.

Predictions show that prototype devices (X or P) have a greater failure rate than the standard production devices. Texas Instruments recommends that these devices not be used in any production system because their expected end-use failure rate still is undefined. Only qualified production devices are to be used.

Figure 6-1 provides a legend for reading the device.

nomen_am1707_sprs637.gifFigure 6-1 Device Nomenclature

6.2 Documentation Support

The following documents describe the device. Copies of these documents are available on the Internet at www.ti.com. Tip: Enter the literature number in the search box provided at www.ti.com.

    Reference Guides
    SPRUGR6 AM1707 ARM Microprocessor System Reference Guide
    SPRUFU0 AM17x/AM18x ARM Microprocessor Peripherals Overview Reference Guide

6.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

    TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    TI Embedded Processors Wiki Texas Instruments Embedded Processors Wiki. Established to help developers get started with Embedded Processors from Texas Instruments and to foster innovation and growth of general knowledge about the hardware and software surrounding these devices.

6.4 Trademarks

E2E is a trademark of Texas Instruments.

ETM9, CoreSight are trademarks of ARM Limited.

ARM9 is a trademark of ARM.

All other trademarks are the property of their respective owners.

6.5 Electrostatic Discharge Caution

esds-image

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

6.6 Glossary

SLYZ022TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.