SLLS103P December   1990  – March 2024 AM26C31

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics: AM26C31C and AM26C31I
    6. 5.6 Electrical Characteristics: AM26C31Q and AM26C31M
    7. 5.7 Switching Characteristics: AM26C31C and AM26C31I
    8. 5.8 Switching Characteristics: AM26C31Q and AM26C31M
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Active-High and Active-Low
      2. 7.3.2 Operates From a Single 5V Supply
    4. 7.4 Device Functional Modes
  9. 8 Application Information Disclaimer
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Parameter Measurement Information

GUID-84F6E891-C370-4D3C-9378-72F5E49D452A-low.gifFigure 6-1 Differential and Common-Mode Output Voltages
GUID-B3C05E67-C55D-46E6-AE57-D722DEDBF293-low.gif
A. C1, C2, and C3 include probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1MHz, duty cycle ≤ 50%, and tr, tf ≤ 6ns.
Figure 6-2 Propagation Delay Time and Skew Waveforms and Test Circuit
GUID-02EA0B86-BDE1-4FE0-AC3B-15DF026C41DB-low.gif
A. C1, C2, and C3 include probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1MHz, duty cycle ≤ 50%, and tr, tf ≤ 6ns.
Figure 6-3 Differential-Output Rise and Fall-Time Waveforms and Test Circuit
GUID-5B28F709-675B-4A0C-B502-9925B2F7F862-low.gif
A. C1, C2, and C3 include probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1MHz, duty cycle ≤ 50%, and tr, tf ≤ 6ns.
C. Each enable is tested separately.
Figure 6-4 Output Enable and Disable Time Waveforms and Test Circuit