SLLS849E april   2008  – august 2023 AM26LV32E

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 ±7-V Common-Mode Range With ±200-mV Sensitivity
      2. 8.3.2 Input Fail-Safe Circuitry
      3. 8.3.3 Active-High and Active-Low
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enable and Disable
  10. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Parameter Measurement Information

GUID-EA09461A-66E6-4C3D-A18C-00348F05FAD2-low.gif
A. CL includes probe and jig capacitance.
Figure 7-1 Switching Test Circuit and Voltage Waveforms
GUID-2F8F753A-109C-48C6-8A43-6C4421893846-low.gif
A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle ≤ 50%, tr = tf = 6 ns.
Figure 7-2 Enable/Disable Time Test Circuit and Output Voltage Waveforms