SPRSP98A November   2023  – June 2024 AM625SIP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
    1. 3.1 Functional Block Diagram
  5. 4 Device Comparison
    1. 4.1 Related Products
  6. 5 Terminal Configuration and Functions
    1. 5.1 Pin Diagrams
    2. 5.2 Pin Attributes and Signal Descriptions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Operating Performance Points
    5. 6.5 Thermal Resistance Characteristics
      1. 6.5.1 Thermal Resistance Characteristics for AMK Package
    6. 6.6 Timing and Switching Characteristics
      1. 6.6.1 Power Supply Requirements
        1. 6.6.1.1 Power Supply Sequencing
  8. 7 Applications, Implementation, and Layout
    1. 7.1 Peripheral- and Interface-Specific Design Information
      1. 7.1.1 Integrated LPDDR4 SDRAM Information
  9. 8 Device and Documentation Support
    1. 8.1 Device Nomenclature
      1. 8.1.1 Standard Package Symbolization
      2. 8.1.2 Device Naming Convention
    2. 8.2 Tools and Software
    3. 8.3 Documentation Support
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Packaging Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • AMK|425
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.6.1.1 Power Supply Sequencing

This section describes the device power sequence requirements for the VDDS_MEM_1P1 and VDDS_MEM_1P8 power rails relative to the other device power rails, which have been defined in the Power-Up Sequencing and Power-Down Sequencing sections of the AM62x Sitara Processors Datasheet.

The VDDS_MEM_1P1 power rail should be sourced from the same power supply that is sourcing VDDS_DDR. Therefore, the VDDS_MEM_1P1 power rail should ramp up and down with the power rails associated with waveform E.

The VDDS_MEM_1P8 power rail should ramp up and down with the power rails associated with waveform C.

For additional power sequence requirement details associated with the integrated LPDDR4 SDRAM, see the Integrated Silicon Solution (ISSI®) IS43/46LQ16256B Datasheet .