SPRSP92C February 2023 – June 2024 AM69 , AM69A
PRODMIX
Refer to the PDF data sheet for device specific package drawings
SIGNAL NAME [1] ((3)) ((2)) | PIN TYPE [2] | DESCRIPTION [3] | ALY PIN [4] | AND PIN [4] |
---|---|---|---|---|
DDR2_CKN | IO | DDRSS Differential Clock (negative) | K1 | |
DDR2_CKP | IO | DDRSS Differential Clock (positive) | L2 | |
DDR2_RESETn | IO | DDRSS Reset | J5 | |
DDR2_RET | I | DDR Retention Enable | L8 | |
DDR2_CA0 | IO | DDRS Command Address | K3 | |
DDR2_CA1 | IO | DDRS Command Address | L3 | |
DDR2_CA2 | IO | DDRS Command Address | K5 | |
DDR2_CA3 | IO | DDRS Command Address | L4 | |
DDR2_CA4 | IO | DDRS Command Address | K4 | |
DDR2_CA5 | IO | DDRS Command Address | L7 | |
DDR2_CAL0 (1) | A | DDRSS IO Pad Calibration Resistor | U7 | |
DDR2_CKE0 | IO | DDR Clock Enable | L6 | |
DDR2_CKE1 | IO | DDR Clock Enable | J2 | |
DDR2_CSn0_0 | IO | DDRSS Chip Select | J3 | |
DDR2_CSn0_1 | IO | DDRSS Chip Select | J6 | |
DDR2_CSn1_0 | IO | DDRSS Chip Select | J7 | |
DDR2_CSn1_1 | IO | DDRSS Chip Select | K7 | |
DDR2_DM0 | IO | DDRSS Data Mask | T2 | |
DDR2_DM1 | IO | DDRSS Data Mask | M6 | |
DDR2_DM2 | IO | DDRSS Data Mask | G4 | |
DDR2_DM3 | IO | DDRSS Data Mask | D5 | |
DDR2_DQ0 | IO | DDRSS Data | T4 | |
DDR2_DQ1 | IO | DDRSS Data | R6 | |
DDR2_DQ2 | IO | DDRSS Data | R3 | |
DDR2_DQ3 | IO | DDRSS Data | R4 | |
DDR2_DQ4 | IO | DDRSS Data | P6 | |
DDR2_DQ5 | IO | DDRSS Data | P5 | |
DDR2_DQ6 | IO | DDRSS Data | T5 | |
DDR2_DQ7 | IO | DDRSS Data | R7 | |
DDR2_DQ8 | IO | DDRSS Data | N2 | |
DDR2_DQ9 | IO | DDRSS Data | N4 | |
DDR2_DQ10 | IO | DDRSS Data | P2 | |
DDR2_DQ11 | IO | DDRSS Data | P3 | |
DDR2_DQ12 | IO | DDRSS Data | M7 | |
DDR2_DQ13 | IO | DDRSS Data | N5 | |
DDR2_DQ14 | IO | DDRSS Data | M4 | |
DDR2_DQ15 | IO | DDRSS Data | M3 | |
DDR2_DQ16 | IO | DDRSS Data | F3 | |
DDR2_DQ17 | IO | DDRSS Data | G7 | |
DDR2_DQ18 | IO | DDRSS Data | H6 | |
DDR2_DQ19 | IO | DDRSS Data | H4 | |
DDR2_DQ20 | IO | DDRSS Data | G2 | |
DDR2_DQ21 | IO | DDRSS Data | H3 | |
DDR2_DQ22 | IO | DDRSS Data | G5 | |
DDR2_DQ23 | IO | DDRSS Data | F2 | |
DDR2_DQ24 | IO | DDRSS Data | E4 | |
DDR2_DQ25 | IO | DDRSS Data | D2 | |
DDR2_DQ26 | IO | DDRSS Data | F6 | |
DDR2_DQ27 | IO | DDRSS Data | F5 | |
DDR2_DQ28 | IO | DDRSS Data | E3 | |
DDR2_DQ29 | IO | DDRSS Data | E7 | |
DDR2_DQ30 | IO | DDRSS Data | E6 | |
DDR2_DQ31 | IO | DDRSS Data | D4 | |
DDR2_DQS0N | IO | DDRS Complimentary Data Strobe | R1 | |
DDR2_DQS0P | IO | DDRS Data Strobe | T1 | |
DDR2_DQS1N | IO | DDRS Complimentary Data Strobe | M1 | |
DDR2_DQS1P | IO | DDRS Data Strobe | N1 | |
DDR2_DQS2N | IO | DDRS Complimentary Data Strobe | G1 | |
DDR2_DQS2P | IO | DDRS Data Strobe | H1 | |
DDR2_DQS3N | IO | DDRS Complimentary Data Strobe | D1 | |
DDR2_DQS3P | IO | DDRS Data Strobe | E1 |