SBASAY6 December 2024 AMC0236
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Figure 7-2 conceptualizes the second-order, switched-capacitor, feed-forward ΔΣ modulator implemented in the AMC0x36. The output V5 of the 1-bit, digital-to-analog converter (DAC) is subtracted from the input voltage VIN = (VINP – VSNSN). This subtraction provides an analog voltage V1 at the input of the first integrator stage. The output of the first integrator feeds the input of the second integrator stage. The result or the second integration is an output voltage V3 that is summed with the input signal VIN and the output of the first integrator V2. Depending on the value of the resulting voltage V4, the output of the comparator is changed. In this case, the 1-bit DAC responds on the next clock pulse by changing the associated analog output voltage V5. Thus, causing the integrators to progress in the opposite direction and forcing the integrator output value to track the average value of the input.