SBASAH9 February 2022 AMC1306M25-Q1
PRODUCTION DATA
If a full-scale input signal is applied to the AMC1306M25-Q1 (that is, |VIN| ≥ |VClipping|), the device generates a single one or zero every 128 bits at DOUT, as shown in Figure 7-5, depending on the actual polarity of the signal being sensed. In this way, differentiating between a missing AVDD and a full-scale input signal is possible on the system level.