SBASAO0A May 2023 – September 2023 AMC130M03
PRODUCTION DATA
Figure 9-9 illustrates a layout recommendation with the critical placement of the decoupling capacitors. The same component reference designators are used as in the Power Supply RecommendationsPower Supply Recommendations section.
For best EMI performance, do not dedicate a ground plane on the high-side, but connect the ground reference for the high-side (HGND) using individual traces as illustrated in Figure 9-9.
Route digital traces away from all analog inputs and associated components to minimize interference.
Use C0G capacitors on the analog inputs. Use ceramic capacitors (for example, X7R grade) for the power-supply decoupling capacitors. High-K capacitors (Y5V) are not recommended. Place the required capacitors as close as possible to the device pins using short, direct traces. For optimum performance, use low-impedance connections on the ground-side connections of the bypass capacitors.
When applying an external clock, make sure the clock is free of overshoot and glitches. A source-termination resistor placed at the clock buffer often helps reduce overshoot. Glitches present on the clock input can lead to noise within the conversion data.