SBASAJ7A June   2022  – August 2022

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information 
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications 
    7. 6.7  Safety-Related Certifications 
    8. 6.8  Safety Limiting Values 
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics 
    11. 6.11 Timing Diagrams
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Reference Input
      3. 7.3.3 Isolation Channel Signal Transmission
      4. 7.3.4 Open-Drain Digital Output
        1. 7.3.4.1 Transparent Output Mode
        2. 7.3.4.2 Latch Output Mode
      5. 7.3.5 Power-Up and Power-Down Behavior
      6. 7.3.6 VDD1 Brownout and Power-Loss Behavior
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 DC Link Overcurrent Detection
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
    3. 8.3 Application Curves
    4. 8.4 Best Design Practices
    5. 8.5 Power Supply Recommendations
    6. 8.6 Layout
      1. 8.6.1 Layout Guidelines
      2. 8.6.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  10. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.4 Open-Drain Digital Output

The AMC22C11-Q1 provides an open-drain output with optional latching function. The output is actively pulled low when VIN exceeds the threshold value defined by the voltage on the REF pin, see Figure 7-1.

The open-drain output is diode-connected to the VDD2 supply (see the Section 7.2), meaning that the output cannot be pulled more than 500 mV above the VDD2 supply before significant current begins to flow into the OUT pin. In particular, the open-drain output is clamped to one diode voltage above ground if VDD2 is at the GND2 level. This behavior is indicated by the gray shadings in Figure 7-5 through Figure 7-10.

On a system level, the CMTI performance of an open-drain signal line depends on the value of the pullup resistor. During a common-mode transient event with a high slew rate (high dV/dt), the open-drain signal line may be pulled low due to parasitic capacitive coupling between the high-side and the low-side of the printed circuit board (PCB). The effect of the parasitic coupling on the signal level is a function of the pullup strength and a lower value pullup resistor results in better CMTI performance. The AMC22C11-Q1 has been characterized with a relatively weak pullup resistor value of 10 kΩ to ensure that the specified CMTI performance is met in a typical application with a 4.7 kΩ or lower pullup resistor.