SLVSCV5E March   2015  – December 2024 ATL431 , ATL432

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics, ATL431Ax, ATL432Ax
    6. 5.6 Electrical Characteristics, ATL431Bx, ATL432Bx
    7. 5.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Open Loop (Comparator)
      2. 7.4.2 Closed Loop
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Comparator With Integrated Reference (Open-Loop)
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Basic Operation
          2. 8.2.1.2.2 Overdrive
          3. 8.2.1.2.3 Output Voltage and Logic Input Level
            1. 8.2.1.2.3.1 Input Resistance
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Shunt Regulator/Reference
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Programming Output/Cathode Voltage
          2. 8.2.2.2.2 Total Accuracy
          3. 8.2.2.2.3 Stability
        3. 8.2.2.3 Application Curves
  10. Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
Output Voltage and Logic Input Level

In order for ATL43x to properly be used as a comparator, the logic output must be readable by the receiving logic device. This is accomplished by knowing the input high and low level threshold voltage levels, typically denoted by VIH and VIL.

As seen in Figure 8-3, the output low level voltage for ATL43x in open-loop/comparator mode is ~2V, which is sufficient for some ≥ 5-V supplied logic. However, would not work for 3.3-V and 1.8-V supplied logic. To accommodate this, a resistive divider can be tied to the output to attenuate the output voltage to a voltage legible to the receiving low voltage logic device.

The output high voltage for ATL43x is approximately Vsup due to ATL43x being open-collector. If Vsup is much higher than the receiving maximum input voltage tolerance of the logic, the output must be attenuated to accommodate the reliability of the outgoing logic.

When using a resistive divider on the output, ensure that the sum of the resistive divider (R1 and R2 in Figure 8-2) is much greater than Rsup so that the resistive divider does not interfere with the ability of the ATL43x to pull close to Vsup when turning off.