SLVSCV5E March 2015 – December 2024 ATL431 , ATL432
PRODUCTION DATA
In order for ATL43x to properly be used as a comparator, the logic output must be readable by the receiving logic device. This is accomplished by knowing the input high and low level threshold voltage levels, typically denoted by VIH and VIL.
As seen in Figure 8-3, the output low level voltage for ATL43x in open-loop/comparator mode is ~2V, which is sufficient for some ≥ 5-V supplied logic. However, would not work for 3.3-V and 1.8-V supplied logic. To accommodate this, a resistive divider can be tied to the output to attenuate the output voltage to a voltage legible to the receiving low voltage logic device.
The output high voltage for ATL43x is approximately Vsup due to ATL43x being open-collector. If Vsup is much higher than the receiving maximum input voltage tolerance of the logic, the output must be attenuated to accommodate the reliability of the outgoing logic.
When using a resistive divider on the output, ensure that the sum of the resistive divider (R1 and R2 in Figure 8-2) is much greater than Rsup so that the resistive divider does not interfere with the ability of the ATL43x to pull close to Vsup when turning off.