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Data Sheet
AWR1843AOP
Single-chip 77- and 79-GHz FMCW mmWave Sensor Antennas-On-Package (AOP)
1 Features
- FMCW transceiver
- Integrated 4 receivers and 3 transmitters Antennas-On-Package (AOP)
- Integrated PLL,
transmitter, receiver, Baseband, and ADC
- 76- to 81-GHz coverage
with 4 GHz available bandwidth
- Ultra-accurate chirp
engine based on fractional-N PLL
- TX Effective isotropic
radiated power (EIRP): 16 dBm
- RX Effective isotropic
noise figure: 10 dB (76 to 81 GHz)
- Phase noise at 1 MHz:
- –95 dBc/Hz (76 to
77 GHz)
- –93 dBc/Hz (77 to
81 GHz)
- Built-in calibration and
self-test (monitoring)
- Arm®
Cortex®-R4F-based radio control system
- Built-in firmware
(ROM)
- Self-calibrating system
across process and temperature
- C674x DSP for FMCW signal
processing
- On-chip Memory: 2MB RAM
- Arm Cortex-R4F microcontroller
for object tracking and classification, AUTOSAR, and interface control
- Supports autonomous mode
(loading user application from QSPI flash memory)
- Host interface
- CAN (two instances, one
being CAN-FD)
- Other interfaces available to
user application
- Up to 6 general purpose
ADC channels
- Up to 2 SPI ports
- Up to 2 UARTs
- I2C
- GPIOs
- 2-lane LVDS interface for
raw ADC data and debug instrumentation
- Device
Security (on select part numbers)
- Secure authenticated and
encrypted boot support
- Customer programmable
root keys, symmetric keys (256 bit), Asymmetric keys (up to RSA-2K) with
Key revocation capability
- Crypto software
accelerators - PKA , AES (up to 256 bit), SHA (up to 256 bit),
TRNG/DRGB
- Functional Safety-Compliant
- Developed for functional
safety applications
- Documentation available
to aid ISO26262 functional safety system design up to ASIL-D
- Hardware integrity up to
ASIL-B
- Safety-related
certification
- ISO 26262
certified up to ASIL B by TUV SUD
- AEC-Q100 qualified
- AWR1843AOP advanced features
- Embedded self-monitoring
with no host processor involvement
- Complex baseband
architecture
- Embedded interference
detection capability
- Programmable phase
rotators in transmit path to enable beam forming
- Power management
- Built-in LDO network for
enhanced PSRR
- I/Os support dual voltage
3.3 V/1.8 V
- Clock source
- Supports external
oscillator at 40 MHz
- Supports externally
driven clock (square/sine) at 40 MHz
- Supports 40 MHz crystal
connection with load capacitors
- Easy hardware design
- 0.8-mm pitch, 180-pin 15
mm × 15 mm flip chip BGA package (ALP) for easy assembly and low-cost
PCB design
- Small solution size
- Operating Conditions
- Junction Temperature range: –40°C to 125°C
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