SLUSE42A july   2020  – april 2023 BQ21062

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Linear Charger and Power Path
        1. 9.3.1.1 Battery Charging Process
        2. 9.3.1.2 JEITA and Battery Temperature Dependent Charging
        3. 9.3.1.3 Input Voltage Based Dynamic Power Management (VINDPM)
        4. 9.3.1.4 Battery Supplement Mode
      2. 9.3.2  Protection Mechanisms
        1. 9.3.2.1 Input Over-Voltage Protection
        2. 9.3.2.2 Safety Timer and I2C Watchdog Timer
        3. 9.3.2.3 Thermal Protection and Thermal Charge Current Foldback
        4. 9.3.2.4 Battery Short and Over Current Protection
        5. 9.3.2.5 PMID Short Circuit
      3. 9.3.3  VDD LDO
      4. 9.3.4  Load Switch/LDO Output and Control
      5. 9.3.5  PMID Power Control
      6. 9.3.6  System Voltage (PMID) Regulation
      7. 9.3.7  MR Wake and Reset Input
        1. 9.3.7.1 MR Wake or Short Button Press Functions
        2. 9.3.7.2 MR Reset or Long Button Press Functions
      8. 9.3.8  14-Second Watchdog for HW Reset
      9. 9.3.9  Faults Conditions and Interrupts ( INT)
        1. 9.3.9.1 Flags and Fault Condition Response
      10. 9.3.10 Power Good ( PG) Pin
      11. 9.3.11 External NTC Monitoring (TS)
        1. 9.3.11.1 TS Thresholds
      12. 9.3.12 I2C Interface
        1. 9.3.12.1 F/S Mode Protocol
    4. 9.4 Device Functional Modes
      1. 9.4.1 Ship Mode
      2. 9.4.2 Low Power
      3. 9.4.3 Active Battery
      4. 9.4.4 Charger/Adapter Mode
      5. 9.4.5 Power-Up/Down Sequencing
    5. 9.5 Register Map
      1. 9.5.1 I2C Registers
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Input (IN/PMID) Capacitors
        2. 10.2.2.2 VDD, LDO Input and Output Capacitors
        3. 10.2.2.3 TS
        4. 10.2.2.4 Recommended Passive Components
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

MR Wake or Short Button Press Functions

There are two programmable wake or short button press timers, WAKE1 and WAKE2. When the MR pin is held low for tWAKE1 the device sends an interrupt (128 µs active low pulse in the INT pin) and sets the MRWAKE1_TIMEOUT flag when it expires. If the MR pin continues to be driven low after WAKE1 and the WAKE2 timer expires, the BQ21062 sends a second interrupt and sets the MRWAKE2_TIMOUT flag. WAKE1 is used as the timer to wake the device from ship mode. WAKE2’s only function is to send the interrupt and has no effect on other BQ21062 functions. These flags are not cleared until they have been read by the host. Note that interrupts are only sent when the flags are set and the flags must be cleared in order for another interrupt to be sent upon MR press. The timer durations can be set through the MR_WAKEx_TIMER bits in the MRCTRL Register section.

One of the main MR functions is to wake the device from Ship Mode when the MR is asserted. The device will exit the Ship Mode when the MR pin is held low for at least tWAKE1. Immediately after the MR is asserted, VDD will be enabled and the digital will start the WAKE counter. If the MR signal remains low until after the WAKE1 timer expires, the device will power up PMID and LDO (If enabled) completing the exit from the ship mode. If the MR signal goes high before the WAKE1 timer expires, the device will go back to the Ship Mode operation, never powering up PMID or the LDO. Note that if the MR pin remains low after exiting Ship Mode the wake interrupts will not be sent and the long button press functions like HW reset will not occur until the MR pin is toggled. In the case where a valid VIN (VIN > VUVLO) is connected prior to WAKE2 timer expiring, the device will exit the ship mode immediately regardless of the MR or wake timer state. Figure 9-3 and Figure 9-4 show these different scenarios.

GUID-20220923-SS0I-T1Q2-KKXT-GMFLDM94XL8C-low.svg Figure 9-3 MR Wake from Ship Mode (MR_LPRESS_ACTION = Ship Mode, VIN not valid)
GUID-20220923-SS0I-MGTV-FM6X-RCJMNDWTTXRS-low.svg Figure 9-4 MR Wake from Ship Mode – VIN Dependencies