SLUSAW5B January   2012  – December 2014

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (Continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Device Power Up
        1. 9.3.1.1 Power-On-Reset (POR)
        2. 9.3.1.2 Power Up from Battery without DC Source
          1. 9.3.1.2.1 BATFET Turn Off
          2. 9.3.1.2.2 Shipping Mode
        3. 9.3.1.3 Power Up from DC Source
          1. 9.3.1.3.1 REGN LDO
          2. 9.3.1.3.2 Input Source Qualification
          3. 9.3.1.3.3 Input Current Limit Detection
          4. 9.3.1.3.4 D+/D- Detection Sets Input Current Limit in bq24190
          5. 9.3.1.3.5 PSEL/OTG Pins Set Input Current Limit in bq24192, bq24192I
          6. 9.3.1.3.6 HIZ State wth 100mA USB Host
          7. 9.3.1.3.7 Force Input Current Limit Detection
        4. 9.3.1.4 Converter Power-Up
        5. 9.3.1.5 Boost Mode Operation from Battery
      2. 9.3.2 Power Path Management
        1. 9.3.2.1 Narrow VDC Architecture
        2. 9.3.2.2 Dynamic Power Management
        3. 9.3.2.3 Supplement Mode
      3. 9.3.3 Battery Charging Management
        1. 9.3.3.1 Autonomous Charging Cycle
        2. 9.3.3.2 Battery Charging Profile
        3. 9.3.3.3 Battery Path Impedance IR Compensation
        4. 9.3.3.4 Thermistor Qualification
          1. 9.3.3.4.1 Cold/Hot Temperature Window
        5. 9.3.3.5 Charging Termination
          1. 9.3.3.5.1 Termination when REG02[0] = 1
          2. 9.3.3.5.2 Termination when REG05[6] = 1
        6. 9.3.3.6 Charging Safety Timer
        7. 9.3.3.7 USB Timer when Charging from USB100mA Source
      4. 9.3.4 Status Outputs (PG, STAT, and INT)
        1. 9.3.4.1 Power Good Indicator (PG)
        2. 9.3.4.2 Charging Status Indicator (STAT)
        3. 9.3.4.3 Interrupt to Host (INT)
      5. 9.3.5 Protections
        1. 9.3.5.1 Input Current Limit on ILIM
        2. 9.3.5.2 Thermal Regulation and Thermal Shutdown
        3. 9.3.5.3 Voltage and Current Monitoring in Buck Mode
          1. 9.3.5.3.1 Input Over-Voltage (ACOV)
          2. 9.3.5.3.2 System Over-Voltage Protection (SYSOVP)
        4. 9.3.5.4 Voltage and Current Monitoring in Boost Mode
          1. 9.3.5.4.1 VBUS Over-Voltage Protection
        5. 9.3.5.5 Battery Protection
          1. 9.3.5.5.1 Battery Over-Current Protection (BATOVP)
          2. 9.3.5.5.2 Charging During Battery Short Protection
          3. 9.3.5.5.3 System Over-Current Protection
      6. 9.3.6 Serial Interface
        1. 9.3.6.1 Data Validity
        2. 9.3.6.2 START and STOP Conditions
        3. 9.3.6.3 Byte Format
        4. 9.3.6.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 9.3.6.5 Slave Address and Data Direction Bit
          1. 9.3.6.5.1 Single Read and Write
          2. 9.3.6.5.2 Multi-Read and Multi-Write
    4. 9.4 Device Functional Modes
      1. 9.4.1 Host Mode and Default Mode
        1. 9.4.1.1 Plug in USB100mA Source with Good Battery
        2. 9.4.1.2 USB Timer when Charging from USB 100-mA Source
    5. 9.5 Register Map
      1. 9.5.1 I2C Registers
        1. 9.5.1.1  Input Source Control Register REG00 (bq24190, bq24192 reset = 00110000, or 30; bq24192I reset = 00111000, or 38)
        2. 9.5.1.2  Power-On Configuration Register REG01 (reset = 00011011, or 1B)
        3. 9.5.1.3  Charge Current Control Register REG02 (bq24190, bq24192 reset = 01100000, or 60; bq24192I reset = 00100000, or 20)
        4. 9.5.1.4  Pre-Charge/Termination Current Control Register REG03 (reset = 00010001, or 11)
        5. 9.5.1.5  Charge Voltage Control Register REG04 (bq24190, bq241192 reset = 10110010, or B2; bq24192I reset = 10011010, or 9A)
        6. 9.5.1.6  Charge Termination/Timer Control Register REG05 (reset = 10011010, or 9A)
        7. 9.5.1.7  IR Compensation / Thermal Regulation Control Register REG06 (reset = 00000011, or 03)
        8. 9.5.1.8  Misc Operation Control Register REG07 (reset = 01001011, or 4B)
        9. 9.5.1.9  System Status Register REG08
        10. 9.5.1.10 Fault Register REG09
        11. 9.5.1.11 Vender / Part / Revision Status Register REG0A (bq24190 reset = 00100011, or 23; bq24192 reset = 00101011, or 2B; bq24192I reset = 00001011, or 0B)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Inductor Selection
        2. 10.2.2.2 Input Capacitor
        3. 10.2.2.3 Output Capacitor
      3. 10.2.3 Application Performance Plots
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Related Links
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

10.1 Application Information

A typical application consists of the device configured as an I2C controlled power path management device and a single cell Li-Ion battery charger for single cell Li-Ion and Li-polymer batteries used in a wide range of tablets and other portable devices. It integrates an input reverse-blocking FET (RBFET, Q1), high-side switching FET (HSFET, Q2), low-side switching FET (LSFET, Q3), and BATFET (Q4) between the system and battery. The device also integrates a bootstrap diode for the high-side gate drive.

10.2 Typical Application

Bq24190_with_D_D_Detection_charging_from_USB_SDP_DCP_SLUSAW5A.gifFigure 37. bq24190 with D+/D- Detection and USB On-The-Go (OTG)
Bq24192_with_PSEL_from_USB_PHY_charging_from_USB_SDP_DCP_SLUSAW5A.gifFigure 38. bq24192 with PSEL and USB On-The-Go (OTG)
bq24192I_with_PSEL_from_USB_PHY_charging_from_USB_and_Adapter_SLUSAW5A.gifFigure 39. bq24192I with PSEL, USB On-The-Go (OTG), No Thermistor Connections

10.2.1 Design Requirements

Table 19. Design Requirements

DESIGN PARAMETER EXAMPLE VALUE
Input voltage 3.9 V to 17 V
Input current limit 3000 mA
Fast charge current 4000 mA
Boost mode output current 1.3 A

10.2.2 Detailed Design Procedure

10.2.2.1 Inductor Selection

The bq24190, bq24192, bq24192I has 1.5-MHz switching frequency to allow the use of small inductor and capacitor values. The Inductor saturation current should be higher than the charging current (ICHG) plus half the ripple current (IRIPPLE):

Equation 5. Eq5_slusaw5.gif

The inductor ripple current depends on input voltage (VBUS), duty cycle (D = VBAT/VVBUS), switching frequency (fs) and inductance (L):

Equation 6. Eq6_slusaw5.gif

The maximum inductor ripple current happens with D = 0.5 or close to 0.5. Usually inductor ripple is designed in the range of (20 to 40%) maximum charging current as a trade-off between inductor size and efficiency for a practical design. Typical inductor value is 2.2 µH.

10.2.2.2 Input Capacitor

Input capacitor should have enough ripple current rating to absorb input switching ripple current. The worst case RMS ripple current is half of the charging current when duty cycle is 0.5. If the converter does not operate at 50% duty cycle, then the worst case capacitor RMS current ICIN occurs where the duty cycle is closest to 50% and can be estimated by the following equation:

Equation 7. Eq7_slusaw5.gif

For best performance, VBUS should be decouple to PGND with 1-μF capacitance. The remaining input capacitor should be place on PMID.

Low ESR ceramic capacitor such as X7R or X5R is preferred for input decoupling capacitor and should be placed to the drain of the high side MOSFET and source of the low side MOSFET as close as possible. Voltage rating of the capacitor must be higher than normal input voltage level. 25-V rating or higher capacitor is preferred for 15-V input voltage.

10.2.2.3 Output Capacitor

Output capacitor also should have enough ripple current rating to absorb output switching ripple current. The output capacitor RMS current ICOUT is given:

Equation 8. Eq8_slusaw5.gif

The output capacitor voltage ripple can be calculated as follows:

Equation 9. Eq9_slusaw5.gif

At certain input/output voltage and switching frequency, the voltage ripple can be reduced by increasing the output filter LC.

The charger device has internal loop compensator. To get good loop stability, the resonant frequency of the output inductor and output capacitor should be designed between 15 kHz and 25 kHz. With 2.2-µH inductor, the typical output capacitor value is 20 µF. The preferred ceramic capacitor is 6 V or higher rating, X7R or X5R.

10.2.3 Application Performance Plots

SCOPE1_SLUSAW5A.gif
VBAT 3.2 V
Figure 40. bq24190 Power Up from USB100 mA
SCOPE3_SLUSAW5A.gif
Figure 42. bq24192 Power Up with Charge Enabled
SCOPE5_SLUSAW5A.gif
VBUS 12 V
Figure 44. Charge Disable
SCOPE7_SLUSAW5A.gif
VBUS 9 V, IIN 1.5 A, VBAT 3.8 V
Figure 46. Load Transient During Supplement Mode
SCOPE9_SLUSAW5A.gif
VBUS 9 V, No Battery, ISYS 10 mA, Charge Disable
Figure 48. PFM Switching Waveform
SCOPE11_SLUSAW5A.gif
VBAT 3.8 V
Figure 50. Boost Mode Load Transient
SCOPE2_SLUSAW5A.gif
VBAT 3.2 V
Figure 41. bq24192 Power Up with Charge Disabled
SCOPE4_SLUSAW5A.gif
VBUS 5 V
Figure 43. Charge Enable
SCOPE6_SLUSAW5A.gif
VBUS 5 V, IIN 3 A, Charge Disable
Figure 45. Input Current DPM Response without Battery
SCOPE8_SLUSAW5A.gif
VBUS 12 V, VBAT 3.8 V, ICHG 3 A
Figure 47. PWM Switching Waveform
SCOPE10_SLUSAW5A.gif
VBAT 3.8 V, ILOAD 1 A
Figure 49. Boost Mode Switching Waveform