SLUSBC1B September   2013  – December 2016

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (Continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Device Power Up
        1. 8.3.1.1 Power-On-Reset (POR)
        2. 8.3.1.2 Power Up from Battery without DC Source
          1. 8.3.1.2.1 BATFET Turn Off
          2. 8.3.1.2.2 Shipping Mode
        3. 8.3.1.3 Boost Mode Operation from Battery
          1. 8.3.1.3.1 Integrated Control to Switch Between USB Charge Mode and Boost Mode
        4. 8.3.1.4 Power Up from DC Source
          1. 8.3.1.4.1 REGN LDO
          2. 8.3.1.4.2 Input Source Qualification
          3. 8.3.1.4.3 Input Current Limit Detection
          4. 8.3.1.4.4 D+/D- Detection Sets Input Current Limit
          5. 8.3.1.4.5 Force Input Current Limit Detection
        5. 8.3.1.5 Converter Power-Up
        6. 8.3.1.6 Low Power HIZ State
      2. 8.3.2 Power Path Management
        1. 8.3.2.1 Narrow VDC Architecture
        2. 8.3.2.2 Dynamic Power Management
        3. 8.3.2.3 Supplement Mode
      3. 8.3.3 Battery Charging Management
        1. 8.3.3.1 Autonomous Charging Cycle
        2. 8.3.3.2 Battery Charging Profile
        3. 8.3.3.3 Thermistor Qualification
          1. 8.3.3.3.1 Cold/Hot Temperature Window
        4. 8.3.3.4 Charging Termination
          1. 8.3.3.4.1 Termination When REG02[0] = 1
        5. 8.3.3.5 Charging Safety Timer
          1. 8.3.3.5.1 Safety Timer Configuration Change
      4. 8.3.4 Status Outputs (STAT, and INT)
        1. 8.3.4.1 Charging Status Indicator (STAT)
        2. 8.3.4.2 Interrupt to Host (INT)
      5. 8.3.5 Protections
        1. 8.3.5.1 Input Current Limit on ILIM
        2. 8.3.5.2 Thermal Regulation and Thermal Shutdown
        3. 8.3.5.3 Voltage and Current Monitoring in Buck Mode
          1. 8.3.5.3.1 Input Over-Voltage (ACOV)
          2. 8.3.5.3.2 System Over-Voltage Protection (SYSOVP)
        4. 8.3.5.4 Current Monitoring in Boost Mode
        5. 8.3.5.5 Battery Protection
          1. 8.3.5.5.1 Battery Over-Voltage Protection (BATOVP)
          2. 8.3.5.5.2 Battery Short Protection
          3. 8.3.5.5.3 System Over-Current Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Host Mode and Default Mode
    5. 8.5 Programming
      1. 8.5.1 Serial Interface
        1. 8.5.1.1 Data Validity
        2. 8.5.1.2 START and STOP Conditions
        3. 8.5.1.3 Byte Format
        4. 8.5.1.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 8.5.1.5 Slave Address and Data Direction Bit
          1. 8.5.1.5.1 Single Read and Write
          2. 8.5.1.5.2 Multi-Read and Multi-Write
    6. 8.6 Register Map
      1. 8.6.1 I2C Registers
        1. 8.6.1.1  Input Source Control Register REG00 [reset = 01011000, or 0x58]58 to 0x58 in heading
        2. 8.6.1.2  Power-On Configuration Register REG01 [reset = 0011101100011011 to 00111011 and 0x1B to 0x3B in heading, or 0x3B]
        3. 8.6.1.3  Charge Current Control Register REG02 [reset = 00100000, or 0x20]
        4. 8.6.1.4  Pre-Charge/Termination Current Control Register REG03 [reset = 00010001, or 0x11]
        5. 8.6.1.5  Charge Voltage Control Register REG04 [reset = 10110010, or 0xB2]
        6. 8.6.1.6  Charge Termination/Timer Control Register REG05 [reset = 10011100, or 0x9C]
        7. 8.6.1.7  Boost Voltage/Thermal Regulation Control Register REG06 [reset = 10010011, or 0x93]
        8. 8.6.1.8  Misc Operation Control Register REG07 [reset = 01001011, or 0x4B4B to 0x4B in heading ]
        9. 8.6.1.9  System Status Register REG08
        10. 8.6.1.10 New Fault Register REG09
        11. 8.6.1.11 Vender / Part / Revision Status Register REG0A
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Input Capacitor
        3. 9.2.2.3 Output Capacitor
      3. 9.2.3 Application Performance Plots
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Device and Documentation Support

Documentation Support

Related Documentation

bq24296/7 EVM (PWR021) User’s Guide (SLUUAQ1)

Quad Flatpack No-Lead Logic Packages Application Report (SCBA017)

QFN/SON PCB Attachment Application Report (SLUA271)

Receiving Notification of Documentation Updates

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Community Resources

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Trademarks

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All other trademarks are the property of their respective owners.

Electrostatic Discharge Caution

esds-image

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

Glossary

SLYZ022TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.