The bq24298 is a highly-integrated switch-mode battery charge management and system power path management device for 1 cell Li-Ion and Li-polymer battery in a wide range of smart phone and tablet applications. Its low impedance power path optimizes switch-mode operation efficiency, reduces battery charging time and extends battery life during discharging phase.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
bq24298 | WQFN (24) | 4.00 mm x 4.00 mm |
Changes from * Revision (April 2015) to A Revision
The I2C serial interface with charging and system settings makes the device a truly flexible solution.
The device supports 3.9V – 6.2V USB input sources, including standard USB host port and USB charging port with 6.4V over-voltage protection. The device supports USB 2.0 and USB 3.0 power specifications with input current and voltage regulation. To set the default input current limit, the bq24298 takes the result from the detection circuit in the system, such as USB PHY device. The device also supports USB On-the-Go operation by providing fast startup and supplying adjustable voltage 4.55 – 5.5V (default 5V) on the VBUS with an accurate current limit up to 1.5A.
The power path management regulates the system slightly above battery voltage but does not drop below 3.5V minimum system voltage (programmable). With this feature, the system keeps operating even when the battery is completely depleted or removed. When the input source current or voltage limit is reached, the power path management automatically reduces the charge current to zero and then starts discharges the battery until the system power requirement is met. This supplement mode operation keeps the input source from getting overloaded.
The device initiates and completes a charging cycle when host control is not available. It automatically charges the battery in three phases: pre-conditioning, constant current and constant voltage. In the end, the charger automatically terminates when the charge current is below a preset limit in the constant voltage phase. Later on, when the battery voltage falls below the recharge threshold, the charger will automatically start another charging cycle.
The charge device provides various safety features for battery charging and system operation, including negative thermistor monitoring, charging safety timer and over-voltage/over-current protections. The thermal regulation reduces charge current when the junction temperature exceeds 120°C (programmable).
The STAT output reports the charging status and any fault conditions. The INT immediately notifies host when fault occurs.
The bq24298 is available in a 24-pin, 4.00-mm x 4.00-mm thin WQFN package.
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NAME | NUMBER | ||
VBUS | 1,24 | P | Charger Input Voltage. The internal n-channel reverse block MOSFET (RBFET) is connected between VBUS and PMID with VBUS on source. Place a 1-µF ceramic capacitor from VBUS to PGND and place it as close as possible to IC. |
PSEL | 2 | I | Power source selection input. High indicates a USB host source and Low indicates an adapter source. |
PG | 3 | O | Open drain active low power good indicator. Connect to the pull up rail via 10-kΩ resistor. LOW indicates a good input source if the input voltage is between UVLO and ACOV, above SLEEP mode threshold, and current limit is above 30 mA. |
STAT | 4 | O | Open drain charge status output to indicate various charger operation. Connect to the pull up rail via 10-kΩ resistor. LOW indicates charge in progress. HIGH indicates charge complete or charge disabled. When any fault condition occurs, STAT pin in the charge blinks at 1 Hz. |
SCL | 5 | I | I2C Interface clock. Connect SCL to the logic rail through a 10-kΩ resistor. |
SDA | 6 | I/O | I2C Interface data. Connect SDA to the logic rail through a 10-kΩ resistor. |
INT | 7 | O | Open-drain Interrupt Output. Connect the INT to a logic rail via 10kΩ resistor. The INT pin sends active low, 256-µs pulse to host to report charger device status and fault. |
OTG | 8 | I Digital |
USB current limit selection pin during buck mode, and active high enable pin during boost mode. |
For bq24298, when in buck mode with USB host (PSEL = High), when OTG = High, IIN limit = 500 mA and when OTG = Low, IIN limit = 100 mA. | |||
The boost mode is activated when the REG01[5] = 1 and OTG pin is High. | |||
CE | 9 | I | Active low Charge Enable pin. Battery charging is enabled when REG01[5:4] = 01 and CE pin = Low. CE pin must be pulled high or low. |
ILIM | 10 | I | ILIM pin sets the maximum input current limit by regulating the ILIM voltage at 1 V. A resistor is connected from ILIM pin to ground to set the maximum limit as IINMAX = (1V/RILIM) × KILIM. The actual input current limit is the lower one set by ILIM and by I2C REG00[2:0]. The minimum input current programmed on ILIM pin is 500 mA. |
TS | 11 | I Analog |
Temperature qualification voltage input. Connect a negative temperature coefficient thermistor. Program temperature window with a resistor divider from REGN to TS to GND. Charge suspends or Boost disable when TS pin is out of range. A 103AT-2 thermistor is recommended. |
QON | 12 | I | BATFET enables control in shipping mode and BATFET reset function. Logic high to low transition on this pin with at least tQON_ON_1 deglitch turns on BATFET to exit shipping mode. It has internal pull up to maintain default high logic. When VBUS is not plugged-in, a logic low of at least tQON_RST will reset SYS power by turning BATFET off for tBATFET_RST and then re-enable BATFET after tBATFET_RST duration. The pin integrates a pull-up resistor of typical 187 kΩ. |
BAT | 13,14 | P | Battery connection point to the positive pin of the battery pack. The internal BATFET is connected between BAT and SYS. Connect a 10 µF closely to the BAT pin. |
SYS | 15,16 | I | System connection point. The internal BATFET is connected between BAT and SYS. When the battery falls below the minimum system voltage, switch-mode converter keeps SYS above the minimum system voltage. The SYS pin has a built-in load to ground which may discharge 330-µF load to less than 0.3 V within 250 ms typically. |
PGND | 17,18 | P | Power ground connection for high-current power converter node. Internally, PGND is connected to the source of the n-channel LSFET. On PCB layout, connect directly to ground connection of input and output capacitors of the charger. A single point connection is recommended between power PGND and the analog GND near the IC PGND pin. |
SW | 19,20 | O | Switching node connecting to output inductor. Internally SW is connected to the source of the n-channel HSFET and the drain of the n-channel LSFET. Connect the 0.047-µF bootstrap capacitor from SW to BTST. |
BTST | 21 | P | PWM high side driver positive supply. Internally, the BTST is connected to the anode of the boost-strap diode. Connect the 0.047-µF bootstrap capacitor from SW to BTST. |
REGN | 22 | P | PWM low side driver positive supply output. Internally, REGN is connected to the cathode of the boost-strap diode. Connect a 4.7-µF (10-V rating) ceramic capacitor from REGN to analog GND. The capacitor should be placed close to the IC. REGN also serves as bias rail of TS pin. |
Thermal Pad | P | Exposed pad beneath the IC for heat dissipation. Always solder thermal pad to the board, and have vias on the thermal pad plane star-connecting to PGND and ground plane for high-current power converter. |