SLUS912A August   2009  – August 2015

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Overvoltage Protection
      2. 7.3.2 Input Overcurrent Protection
      3. 7.3.3 Battery Overvoltage Protection
      4. 7.3.4 Thermal Protection
      5. 7.3.5 Enable Function
      6. 7.3.6 Fault Indication
    4. 7.4 Device Functional Modes
      1. 7.4.1 OPERATION Mode
      2. 7.4.2 POWER-DOWN Mode
      3. 7.4.3 POWER-ON RESET Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Powering Accessories
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Selection Of RBAT
        2. 8.2.2.2 Selection Of RCE, RFAULT, And RPU
        3. 8.2.2.3 Selection Of Input And Output Bypass Capacitors
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DSG Package
8-Pin WSON With Exposed Thermal Pad
Top View
bq24312 ops_lus912.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
CE 5 I Chip enable input. Active low. When CE = High, the input FET is off. Internally pulled down.
FAULT 4 O Open-drain output, device status. FAULT = Low indicates that the input FET Q1 has been turned off due to input overvoltage, input overcurrent, battery overvoltage, or thermal shutdown.
ILIM 7 I/O Input overcurrent threshold programming. Connect a resistor to VSS to set the overcurrent threshold.
IN 1 I Input power, connect to external DC supply. Connect external 1 μF ceramic capacitor (minimum) to VSS.
NC 3 These pins may have internal circuits used for test purposes. Do not make any external connections at these pins for normal operation.
OUT 8 O Output terminal to the charging system. Connect external 1 μF ceramic capacitor (minimum) to VSS.
VBAT 6 I Battery voltage sense input. Connect to pack positive terminal through a resistor.
VSS 2 — Ground terminal
Thermal PAD — — There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device. The thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do not use the thermal pad as the primary ground input for the device. The VSS pin must be connected to ground at all times.