SLUS763D July   2007  – April 2016

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Down
      2. 7.3.2 Power-On Reset
      3. 7.3.3 Operation
        1. 7.3.3.1 Input Overvoltage Protection
        2. 7.3.3.2 Input Overcurrent Protection
        3. 7.3.3.3 Battery Overvoltage Protection
        4. 7.3.3.4 Thermal Protection
        5. 7.3.3.5 Enable Function
        6. 7.3.3.6 Fault Indication
    4. 7.4 Device Functional Modes
      1. 7.4.1 OPERATION Mode
      2. 7.4.2 POWER-DOWN Mode
      3. 7.4.3 POWER-ON RESET Mode
  8. Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Selection of RBAT
        2. 8.2.2.2 Selection of RCE, RFAULT, and RPU
        3. 8.2.2.3 Selection of Input and Output Bypass Capacitors
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
    1. 9.1 Powering Accessories
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DSG|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Applications and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The bq2431x device protects against overvoltage, overcurrent, and battery overvoltage events that occur due to faulty adapter or other input sources. If any of these faults occur, the bq24308 device isolates the downstream devices from the input source.

8.2 Typical Application

VOVP = 6.8 V, IOCP = 1000 mA, BVOVP = 4.35 V (Terminal numbers shown are for the 2 × 2 DSG package)

bq24314 bq24316 typ_app_lus763.gif Figure 11. Typical Application Schematic

8.2.1 Design Requirements

For this design example, use the parameters shown in Table 1.

Table 1. Design Parameters

PARAMETER VALUE
Supply voltage 5 V
INILIM 1 A

8.2.2 Detailed Design Procedure

8.2.2.1 Selection of RBAT

TI strongly recommends that the battery not be tied directly to the VBAT pin of the device, as under some failure modes of the IC, the voltage at the IN pin may appear on the VBAT pin. This voltage can be as high as 30 V, and applying 30 V to the battery in case of the failure of the bq2431x can be hazardous. Connecting the VBAT pin through RBAT prevents a large current from flowing into the battery in case of a failure of the IC. In the interests of safety, RBAT should have a very high value. The problem with a large RBAT is that the voltage drop across this resistor because of the VBAT bias current IVBAT causes an error in the BVOVP threshold. This error is over and above the tolerance on the nominal 4.35-V BVOVP threshold.

Choosing RBAT in the range 100 kΩ to 470 kΩ is a good compromise. In the case of an IC failure, with RBAT equal to 100 kΩ, the maximum current flowing into the battery would be (30 V – 3 V) ÷ 100 kΩ = 246 μA, which is low enough to be absorbed by the bias currents of the system components. RBAT equal to 100 kΩ would result in a worst-case voltage drop of RBAT × IVBAT = 1mV. This is negligible to compared to the internal tolerance of
50 mV on BVOVP threshold.

If the Bat-OVP function is not required, the VBAT pin must be connected to VSS.

8.2.2.2 Selection of RCE, RFAULT, and RPU

The CE pin can be used to enable and disable the IC. If host control is not required, the CE pin can be tied to ground or left unconnected, permanently enabling the device.

In applications where external control is required, the CE pin can be controlled by a host processor. As in the case of the VBAT pin, the CE pin must be connected to the host GPIO pin through as large a resistor as possible. The limitation on the resistor value is that the minimum VOH of the host GPIO pin less the drop across the resistor must be greater than VIH of the bq2431× CE pin. The drop across the resistor is given by RCE × IIH.

The FAULT pin is an open-drain output that goes low during OV, OC, battery-OV, and OT events. If the application does not require monitoring of the FAULT pin, it can be left unconnected. But if the FAULT pin has to be monitored, it must be pulled high externally through RPU, and connected to the host through RFAULT. RFAULT prevents damage to the host controller if the bq2431x fails. The resistors should be of high value, in practice values between 22 kΩ and 100 kΩ should be sufficient.

8.2.2.3 Selection of Input and Output Bypass Capacitors

The input capacitor CIN in Figure 11 is for decoupling, and serves an important purpose. Whenever there is a step change downwards in the system load current, the inductance of the input cable causes the input voltage to spike up. CIN prevents the input voltage from overshooting to dangerous levels. TI strongly recommends that a ceramic capacitor of at least 1 μF be used at the input of the device. It must be located in close proximity to the IN pin.

COUT in Figure 11 is also important: If a very fast (< 1-μs rise time) overvoltage transient occurs at the input, the current that charges COUT causes the current-limiting loop of the device to kick in, reducing the gate-drive to FET Q1. This results in improved performance for input overvoltage protection. COUT must also be a ceramic capacitor of at least 1 μF, located close to the OUT pin. COUT also serves as the input decoupling capacitor for the charging circuit downstream of the protection IC.

8.2.3 Application Curves

bq24314 bq24316 sft_st_lus763.gif
ROUT = 6.6 Ω
Figure 12. Normal Power-On Showing Soft-Start
bq24314 bq24316 response_lus763.gif
VIN = 5 V to 12 V tr = 1 μs
Figure 14. bq24316 OVP Response for Input Step
bq24314 bq24316 response3_lus763.gif
VIN = 5 V to 12 V tr = 1 μs
Figure 16. bq24314 OVP Response for Input Step
bq24314 bq24316 revov_lus763.gif
VIN = 7.5 V to 5 V tf = 400 μs
Figure 18. Recovery from OVP
bq24314 bq24316 zoom_out_lus763.gif
Figure 20. OCP, Zoom-in on the First Cycle of Figure 19
bq24314 bq24316 vbat_lus763.gif
Figure 22. BAT-OVP, VVBAT Steps from 4.2 V to 4.4 V,
Shows tDGL(BAT-OVP) and Soft-Stop
bq24314 bq24316 pwr_on_lus763.gif
VIN = 0 V to 9 V tr = 50 μs
Figure 13. OVP at Power-On
bq24314 bq24316 response2_lus763.gif
VIN = 5 V to 12 V tr = 20 μs
Figure 15. bq24316 OVP Response for Input Step
bq24314 bq24316 response4_lus763.gif
+
VIN = 5 V to 12 V tr = 20 μs
Figure 17. bq24314 OVP Response for Input Step
bq24314 bq24316 pwr_up_lus763.gif
Figure 19. OCP, Powering Up into a Short Circuit on OUT Pin, OCP Counter Counts to 15 Before Switching OFF the Device
bq24314 bq24316 soft_stop_lus763.gif
Figure 21. OCP, ROUT Switches from 6.6 Ω to 3.3 Ω,
Shows Current Limiting and Soft-Stop
bq24314 bq24316 counter_lus763.gif
Figure 23. BAT-OVP, VVBAT Cycles Between 4.1 V and
4.4 V, Shows BAT-OVP Counter