SLUS893B March 2010 – June 2015
PRODUCTION DATA.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The bq24620 battery charger is ideal for high current charging (up to 10 A) and can charge battery packs consisting of single cells or multiple cells in series. The bq24620EVM evaluation module is a complete charge module for evaluating the bq24620. The application curves were taken using the bq24620EVM. Refer to the EVM user's guide (SLUU410) for EVM information.
NOTE:
VIN = 28 V, BAT = 5-cell Li-Phosphate, Icharge = 3 A, Iprecharge = 0.125 A, Iterm = 0.3 AFor this design example, use the parameters listed in Table 3 as the input parameters.
DESIGN PARAMETER | EXAMPLE VALUE |
---|---|
AC adapter voltage (VIN) | 28 V |
Battery charge voltage (number of cells in series) | 18 V (5 cells) |
Battery charge current (during constant current phase) | 3 A |
Precharge current | 0.125 A |
Termination current | 0.3 A |
The bq24620 has a 300-kHz switching frequency to allow the use of small inductor and capacitor values. Inductor saturation current must be higher than the charging current (ICHARGE) plus half the ripple current (IRIPPLE):
The inductor ripple current depends on input voltage (VIN), duty cycle (D = VOUT/VIN), switching frequency (fS) and inductance (L):
The maximum inductor ripple current happens with D = 0.5. For example, the battery-charging voltage range is from 2.8 V to 14.4 V for a four-cell battery pack. For 20-V adapter voltage, 10-V battery voltage gives the maximum inductor ripple current.
Usually, inductor ripple is designed in the range of 20%–40% of maximum charging current as a trade-off between inductor size and efficiency for a practical design.
The bq24620 has cycle-by-cycle charge undercurrent protection (UCP) by monitoring the charging-current sensing resistor to prevent negative inductor current. The typical UCP threshold is 5 mV falling edge, corresponding to 0.5-A falling edge for a 10-mΩ charging-current-sensing resistor.
The input capacitor must have enough ripple current rating to absorb input switching-ripple current. The worst-case RMS ripple current is half of the charging current when duty cycle is 0.5. If the converter does not operate at 50% duty cycle, then the worst-case capacitor RMS current ICIN occurs where the duty cycle is closest to 50% and can be estimated by the following equation:
A low-ESR ceramic capacitor such as X7R or X5R is preferred for the input-decoupling capacitor and must be placed as close as possible to the drain of the high-side MOSFET and source of the low-side MOSFET. The voltage rating of the capacitor must be higher than the normal input voltage level. A 25-V rating or higher capacitor is preferred for 20-V input voltage. A 20-µF capacitor is suggested for typical of 3-A to 4-A charging current.
The output capacitor also must have enough ripple current rating to absorb the output switching-ripple current. The output capacitor RMS current ICOUT is given:
The output capacitor voltage ripple can be calculated as follows:
At certain input and output voltage and switching frequency, the voltage ripple can be reduced by increasing the output filter LC.
The bq24620 has an internal loop compensator. To get good loop stability, the resonant frequency of the output inductor and output capacitor must be designed from 10 kHz to 15 kHz. The preferred ceramic capacitor is 25 V, X7R, or X5R for 4-cell applications.
Two external N-channel MOSFETs are used for a synchronous switching battery charger. The gate drivers are internally integrated into the IC with 6 V of gate drive voltage. 30-V or higher voltage rating MOSFETs are preferred for 20-V input voltage, and 40-V MOSFETs are preferred for 20-V to 28-V input voltage.
Figure-of-merit (FOM) is usually used for selecting the proper MOSFET, based on a tradeoff between the conduction loss and switching loss. For the top-side MOSFET, FOM is defined as the product of the MOSFET ON-resistance, rDS(on), and the gate-to-drain charge, QGD. For the bottom-side MOSFET, FOM is defined as the product of the MOSFET ON-resistance, rDS(on), and the total gate charge, QG.
The lower the FOM value, the lower the total power loss. Usually lower rDS(on) has higher cost with the same package size.
The top-side MOSFET loss includes conduction loss and switching loss. It is a function of duty cycle (D = VOUT/VIN), charging current (ICHARGE), MOSFET ON-resistance rDS(on)), input voltage (VIN), switching frequency (fS), turnon time (ton), and turnoff time (toff):
The first item represents the conduction loss. Usually MOSFET rDS(on) increases by 50% with 100ºC junction temperature rise. The second term represents the switching loss. The MOSFET turnon and turnoff times are given by:
where Qsw is the switching charge, Ion is the turnon gate-driving current, and Ioff is the turnoff gate-driving current. If the switching charge is not given in the MOSFET data sheet, it can be estimated by gate-to-drain charge (QGD) and gate-to-source charge (QGS):
Total gate-driving current can be estimated by the REGN voltage (VREGN), MOSFET plateau voltage (Vplt), total turnon gate resistance (Ron), and turnoff gate resistance Roff) of the gate driver:
The conduction loss of the bottom-side MOSFET is calculated with the following equation when it operates in synchronous continuous conduction mode:
If the SRP–SRN voltage decreases below 5 mV (the charger is also forced into nonsynchronous mode when the average SRP–SRN voltage is lower than 1.25 mV), the low-side FET is turned off for the remainder of the switching cycle to prevent negative inductor current.
As a result, all the freewheeling current goes through the body diode of the bottom-side MOSFET. The maximum charging current in nonsynchronous mode can be up to 0.9 A (0.5 A typical) for a 10-mΩ charging-current-sensing resistor, considering IC tolerance. Choose the bottom-side MOSFET with either an internal Schottky or body diode capable of carrying the maximum nonsynchronous mode charging current.
MOSFET gate-driver power loss contributes to the dominant losses on controller IC when the buck converter is switching. Choosing a MOSFET with a small Qg_total reduces the IC power loss to avoid thermal shutdown.
where
The VREF load current is another component of the VCC input current (do not overload VREF), where total IC loss can be described by following equations:
During adapter hot plug-in, the parasitic inductance and input capacitor from the adapter cable form a second-order system. The voltage spike at the VCC pin may be beyond the IC maximum voltage rating and damage the IC. The input filter must be carefully designed and tested to prevent an overvoltage event on VCC pin.
There are several methods to damping or limiting the overvoltage spike during adapter hot plug-in. An electrolytic capacitor with high ESR as an input capacitor can damp the overvoltage spike well below the IC maximum pin-voltage rating. A high-current-capability TVS Zener diode can also limit the overvoltage level to an IC-safe level. However, these two solutions may not have low cost or small size.
A cost-effective and small-size solution is shown in Figure 18. R1 and C1 comprise a damping RC network to damp the hot plug-in oscillation. As a result, the overvoltage spike is limited to a safe level. D1 is used for reverse voltage protection for the VCC pin (it can be the input Schottky diode or the body diode of the input ACFET). C2 is a VCC pin-decoupling capacitor, and it must be placed as close as possible to the VCC pin. R2 and C2 form a damping RC network to further protect the IC from high-dv/dt and high-voltage spikes. The C2 value must be less than the C1 value so R1 can be dominant over the ESR of C1 to get enough damping effect for hot plug-in. R1 and R2 packages must be sized to handle the inrush-current power loss according to the resistor manufacturer’s data sheet. The filter component values always must be verified with the real application, and minor adjustments may be needed to fit in the real application circuit.
The bq24620 provides internal loop compensation. With this scheme, best stability occurs when the LC resonant frequency, fo, is approximately 10 kHz to 15 kHz per Equation 20:
Table 4 provides a summary of typical LC components for various charge currents
CHARGE CURRENT | 2 A | 4 A | 6 A | 8 A | 10 A |
---|---|---|---|---|---|
Output inductor LO | 8.2 μH | 8.2 μH | 5.6 μH | 4.7 μH | 4.7 μH |
Output capacitor CO | 20 μF | 20 μF | 20 μF | 40 μF | 40 μF |
Sense resistor | 10 mΩ | 10 mΩ | 10 mΩ | 10 mΩ | 10 mΩ |
PART DESIGNATOR | QTY | DESCRIPTION |
---|---|---|
Q4, Q5 | 2 | N-channel MOSFET, 40 V, 30 A, PowerPAK SO-8, Vishay-Siliconix, SiR426DN |
D1 | 1 | Diode, dual Schottky, 30 V, 200 mA, SOT23, Fairchild, BAT54C |
D2 | 1 | Schottky diode, 40 V, 5 A, SMC, ON Semiconductor, MBRS540T3 |
RSR | 2 | Sense resistor, 10 mΩ, 1%, 1 W, 2010, Vishay-Dale, WSL2010R0100F |
L1 | 1 | Inductor, 6.8 μH, 5.5 A, Vishay-Dale, IHLP2525CZ |
C8, C9, C12, C13 | 4 | Capacitor, ceramic, 10 μF, 35 V, 10%, X7R |
C2 | 1 | Capacitor, ceramic, 2.2 µF, 50 V, 10%, X7R |
C4, C5 | 2 | Capacitor, ceramic, 1 μF, 16 V, 10%, X7R |
C7 | 1 | Capacitor, ceramic, 1 µF, 50 V, 10%, X7R |
C1, C6, C11 | 4 | Capacitor, ceramic, 0.1 μF, 16 V, 10%, X7R |
Cff | 1 | Capacitor, ceramic, 22 pF, 35 V, 10%, X7R |
C10 | 1 | Capacitor, ceramic, 0.1 μF, 50 V, 10% |
R1, R7 | 2 | Resistor, chip, 100 kΩ, 1/16 W, 0.5% |
R2 | 1 | Resistor, chip, 900 kΩ, 1/16 W, 0.5% |
R8 | 1 | Resistor, chip, 22.1 kΩ, 1/16 W, 0.5% |
R9 | 1 | Resistor, chip, 9.31 kΩ, 1/16 W, 1% |
R10 | 1 | Resistor, chip, 430 kΩ, 1/16 W, 1% |
R11 | 1 | Resistor, chip, 2 Ω, 1 W, 5% |
R13, R14 | 2 | Resistor, chip, 10 kΩ, 1/16 W, 5% |
R5 | 1 | Resistor, chip, 100 Ω, 1/16 W, 0.5% |
R6 | 1 | Resistor, chip, 10 Ω, 1 W, 5% |
D3, D4 | 2 | LED diode, green, 2.1 V, 10 mΩ, Vishay-Dale, WSL2010R0100F |
Care must be taken that the total output capacitance at the battery node is not so large that the discharge current source cannot pull the voltage below the LOWV threshold during the 1-second discharge time. The maximum output capacitance can be calculated as seen in Equation 21:
where
The 1.425 factor is the difference between the RECHARGE and the LOWV thresholds at the VFB pin.
EXAMPLE
For a 3-cell Li+ charger, with R2 = 500 kΩ, R1 = 100 kΩ (giving 10.8 V for voltage regulation), IDISCH = 8 mA, tDISCH = 1 second,
Based on these calculations, no more than 930 μF should be allowed on the battery node for proper operation of the battery detection circuit.
VIN: 28 V | VBAT: 16 V | ICHG = 3 A |
VIN: 28 V | VBAT: 16 V | ICHG = 3 A |