SLUSAK9B September 2011 – April 2015
PRODUCTION DATA.
PIN | DESCRIPTION | |
---|---|---|
NAME | NO. | |
ACDET | 6 | Adapter detection input. Program adapter valid input threshold by connecting a resistor divider from adapter input to ACDET pin to GND pin. When ACDET pin is above 0.6 V and VCC is above UVLO, REGN LDO is present, ACOK comparator and IOUT are both active. |
ACDRV | 4 | Charge pump output to drive both adapter input N-channel MOSFET (ACFET) and reverse blocking N-channel MOSFET (RBFET). ACDRV voltage is 6 V above CMSRC when voltage on ACDET pin is between 2.4 V and 3.15 V, voltage on VCC pin is above UVLO and voltage on VCC pin is 275 mV above voltage on SRN pin so that ACFET and RBFET can be turned on to power the system by AC adapter. Place a 4-kΩ resistor from ACDRV to the gate of ACFET and RBFET limits the inrush current on ACDRV pin. |
ACOK | 5 | AC adapter detection open-drain output. It is pulled HIGH to external pullup supply rail by external pullup resistor when voltage on ACDET pin is between 2.4 V and 3.15 V, and voltage on VCC is above UVLO and voltage on VCC pin is 275 mV above voltage on SRN pin, indicating a valid adapter is present to start charge. If any one of the above conditions cannot be met, it is pulled LOW to GND by internal MOSFET. Connect a 10-kΩ pullup resistor from ACOK to the pullup supply rail. |
ACN | 1 | Input current-sense resistor negative input. Place an optional 0.1-µF ceramic capacitor from ACN to GND for common-mode filtering. Place a 0.1-µF ceramic capacitor from ACN to ACP to provide differential-mode filtering. |
ACP | 2 | Input current-sense resistor positive input. Place a 0.1-µF ceramic capacitor from ACP to GND for common-mode filtering. Place a 0.1-µF ceramic capacitor from ACN to ACP to provide differential-mode filtering. |
BATDRV | 11 | Charge pump output to drive battery-to-system N-channel MOSFET (BATFET). BATDRV voltage is 6 V above SRN to turn on BATFET to power the system from battery. BATDRV voltage is SRN voltage to turn off BATFET to power system from AC adapter. Place a 4-kΩ resistor from BATDRV to the gate of BATFET limits the inrush current on BATDRV pin. |
BTST | 17 | High-side power MOSFET driver power supply. Connect a 0.047-µF capacitor from BTST to PHASE, and a bootstrap Schottky diode from REGN to BTST. |
CMSRC | 3 | ACDRV charge pump source input. Place a 4-kΩ resistor from CMSRC to the common source of ACFET (Q1) and RBFET (Q2) limits the inrush current on CMSRC pin. |
GND | 14 | IC ground. On PCB layout, connect to analog ground plane, and only connect to power ground plane through the power pad underneath IC. |
HIDRV | 18 | High-side power MOSFET driver output. Connect to the high-side N-channel MOSFET gate. |
ILIM | 10 | Charge current limit input. Program ILIM voltage by connecting a resistor divider from system reference 3.3-V rail to ILIM pin to GND pin. The lower of ILIM voltage or DAC limit voltage sets charge current regulation limit. To disable the control on ILIM, set ILIM above 1.6 V. Once voltage on ILIM pin falls below 75 mV, charge (buck mode) or discharge (boost mode) is disabled. Charge and discharge is enabled when ILIM pin rises above 105 mV. |
IOUT | 7 | Buffered adapter or charge current output, selectable with SMBus command ChargeOption(). IOUT voltage is 20 times the differential voltage across sense resistor. Place a 100-pF or less ceramic decoupling capacitor from IOUT pin to GND. |
LODRV | 15 | Low-side power MOSFET driver output. Connect to low-side N-channel MOSFET gate. |
PHASE | 19 | High-side power MOSFET driver source. Connect to the source of the high-side N-channel MOSFET. |
PowerPAD™ | — | Exposed pad beneath the IC. Analog ground and power ground star-connected only at the PowerPad plane. Always solder PowerPad to the board, and have vias on the PowerPad plane connecting to analog ground and power ground planes. It also serves as a thermal pad to dissipate the heat. |
REGN | 16 | Linear regulator output. REGN is the output of the 6-V linear regulator supplied from VCC. The LDO is active when voltage on ACDET pin is above 0.6 V and voltage on VCC is above UVLO. Connect a 1-µF ceramic capacitor from REGN to GND. |
SCL | 9 | SMBus open-drain clock input. Connect to SMBus clock line from the host controller or smart battery. Connect a 10-kΩ pullup resistor according to SMBus specifications. |
SDA | 8 | SMBus open-drain data I/O. Connect to SMBus data line from the host controller or smart battery. Connect a 10-kΩ pullup resistor according to SMBus specifications. |
SRN | 12 | Charge current-sense resistor negative input. SRN pin is for battery voltage sensing as well. Connect SRN pin to a 7.5-Ω resistor first, then, from another resistor terminal, connect a 0.1-µF ceramic capacitor to GND for common-mode filtering, and connect to current-sensing resistor. Connect a 0.1-µF ceramic capacitor between current-sensing resistor to provide differential-mode filtering. See Application and Implementation about negative output voltage protection for hard shorts on battery-to-ground or battery-reverse connection by adding small resistor. |
SRP | 13 | Charge current-sense resistor positive input. Connect SRP pin to a 10-Ω resistor first, then from another resistor terminal, connect to current-sensing resistor. Connect a 0.1-µF ceramic capacitor between current-sensing resistor to provide differential-mode filtering. See Application and Implementation about negative output voltage protection for hard shorts on battery to ground or battery reverse connection by adding small resistor. |
VCC | 20 | Input supply, diode OR from adapter or battery voltage. Use 10-Ω resistor and 1-µF capacitor to ground as low-pass filter to limit inrush current. |