SLUSDA7A April   2018  – January 2021 BQ25121A

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Ship Mode
        1. 9.3.1.1 Ship Mode Entry and Exit
      2. 9.3.2  High Impedance Mode
      3. 9.3.3  Active Battery Only Connected
      4. 9.3.4  Voltage Based Battery Monitor
      5. 9.3.5  Sleep Mode
      6. 9.3.6  Input Voltage Based Dynamic Power Management (VIN(DPM))
      7. 9.3.7  Input Overvoltage Protection and Undervoltage Status Indication
      8. 9.3.8  Battery Charging Process and Charge Profile
      9. 9.3.9  Dynamic Power Path Management Mode
      10. 9.3.10 Battery Supplement Mode
      11. 9.3.11 Default Mode
      12. 9.3.12 Termination and Pre-Charge Current Programming by External Components (IPRETERM)
      13. 9.3.13 Input Current Limit Programming by External Components (ILIM)
      14. 9.3.14 Charge Current Programming by External Components (ISET)
      15. 9.3.15 Safety Timer
      16. 9.3.16 External NTC Monitoring (TS)
      17. 9.3.17 Thermal Protection
      18. 9.3.18 Typical Application Power Dissipation
      19. 9.3.19 Status Indicators ( PG and INT)
      20. 9.3.20 Chip Disable ( CD)
      21. 9.3.21 Buck (PWM) Output
      22. 9.3.22 Load Switch / LDO Output and Control
      23. 9.3.23 Manual Reset Timer and Reset Output ( MR and RESET)
    4. 9.4 Device Functional Modes
    5. 9.5 Programming
      1. 9.5.1 Serial Interface Description
      2. 9.5.2 F/S Mode Protocol
    6. 9.6 Register Maps
      1. 9.6.1  Status and Ship Mode Control Register
      2. 9.6.2  Faults and Faults Mask Register
      3. 9.6.3  TS Control and Faults Masks Register
      4. 9.6.4  Fast Charge Control Register
      5. 9.6.5  Termination/Pre-Charge Register
      6. 9.6.6  Battery Voltage Control Register
      7. 9.6.7  SYS VOUT Control Register
      8. 9.6.8  Load Switch and LDO Control Register
      9. 9.6.9  Push-button Control Register
      10. 9.6.10 ILIM and Battery UVLO Control Register
      11. 9.6.11 Voltage Based Battery Monitor Register
      12. 9.6.12 VIN_DPM and Timers Register
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Default Settings
        2. 10.2.2.2 Choose the Correct Inductance and Capacitance
        3. 10.2.2.3 Calculations
          1. 10.2.2.3.1 Program the Fast Charge Current (ISET)
          2. 10.2.2.3.2 Program the Input Current Limit (ILIM)
          3. 10.2.2.3.3 Program the Pre-charge/termination Threshold (IPRETERM)
          4. 10.2.2.3.4 TS Resistors (TS)
      3. 10.2.3 Application Performance Curves
        1. 10.2.3.1 Charger Curves
        2. 10.2.3.2 SYS Output Curves
        3. 10.2.3.3 Load Switch and LDO Curves
        4. 10.2.3.4 LS/LDO Output Curves
        5. 10.2.3.5 Timing Waveforms Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Trademarks
    4. 13.4 Support Resources
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.6 Timing Requirements

MIN TYP MAX UNIT
POWER-PATH MANAGEMENT AND INPUT CURRENT LIMIT
tDGL_SC Deglitch Time, PMID or SW Short Circuit during Discharge Mode 250 µs
tREC_SC Recovery time, OUT Short Circuit during Discharge Mode 2 s
BATTERY CHARGER
tDGL_SHORT Deglitch time transition from ISET short to I(CHARGE) disable Clear fault by disconnecting VIN 1 ms
BATTERY CHARGING TIMERS
tMAXCHG Charge safety timer Programmable range 2 540 min
tPRECHG Precharge safety timer 0.1 x tMAXCHG
SYS OUTPUT
tONMIN Minimum ON time VIN = 3.6 V, VOUT = 2 V, IOUT = 0 mA 225 ns
tOFFMIN Minimum OFF time VIN = 4.2 V 50 ns
tSTART_SW SW start up time VIN = 5 V, from write on EN_SW_OUT until output starts to rise 5 25 ms
tSTART_SYS SYS output time to start switching From insertion of BAT > V(BUVLO) or VIN > V(UVLO) 350 µs
tSOFTSTART Softstart time with reduced current limit 400 1200 µs
LS/LDO OUTPUT
tON_LDO Turn ON time 100-mA load 500 µs
tOFF_LDO Turn OFF time 100-mA load 5 µs
PUSHBUTTON TIMER
tWAKE1 Push button timer wake 1 0.08 1 s
tWAKE2 Push button timer wake 2 Programmable Range for wake2 function 1 2 s
tRESET Push button timer reset Programmable Range for reset function 5 15 s
tRESET_D Reset pulse duration 400 ms
tDD Detection delay (from MR, input to RESET) For 0s condition 6 µs
BATTERY-PACK NTC MONITOR
tDGL(TS) Deglitch time on TS change Applies to V(HOT), V(WARM), V(COOL), and V(COLD) 50 ms
I2C INTERFACE
tI2CRESET I2C interface inactive reset timer 700 ms
tHIZ_ACTIVEBAT Transition time required to enable the I2C interface from HiZ to Active BAT 1 ms
INPUT PIN
t/CD_DGL Deglitch for CD CD rising/falling 100 µs
GUID-C48C135F-313B-4D7F-8C6C-7CD05F8AFD7D-low.gif
Conditions: PGB_MRS = 0, TE = 1, SW_LDO = 1, VINDPM_ON = 0, PG and INT pulled up to SYS, EN_INT = 1
Figure 8-1 Typical Start-Up Timing and Operation
GUID-20200804-CA0I-4VBD-CZDL-LMXJCMQDZ2M0-low.gif
Conditions: SW_LDO = 1, MRREC = 1, PG and INT pulled up to SYS, ISYS = 10 µA, EN_INT = 1
Figure 8-2 Battery Operation and Sleep Mode