SLUSF40 October 2024 BQ25190
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
PIN | I/O(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
IN | E5 | P | DC input power supply. IN is connected to the external DC supply. Bypass IN to GND with at least 1 μF of capacitance using a ceramic capacitor. |
SYS | A5, D5, F5 | P | Regulated system output. Connect ceramic capatitors respectivelly as suggested in Section 8.2.2.2 as close to the SYS and GND pins as possible. |
BAT | C5 | P | Battery Connection. Connect to the positive terminal of the battery. Bypass BAT to GND with at least 1 μF of ceramic capacitance |
GND | A1, B5 | G | Ground connection. Connect to the ground plane of the circuit |
CE | D2 | I | Charge enable. Drive CE low or leave floating to enable charging when VIN is valid. Drive CE high to disable charge. CE has no effect when VIN is not present. |
SCL | D1 | I | I2C interface clock. Connect SCL to the logic rail through a 10 kΩ resistor. |
SDA | E1 | I/O | I2C interface data. Connect SDA to the logic rail through a 10 kΩ resistor. |
INT | B3 | O | INT is an open-drain output that signals fault interrupts. When a fault occurs, a 128 μs active low pulse is sent out as an interrupt for the host. INT is enabled/disabled using the MASK_INT bit in the control register. Can be pulled up to 1- 20 kΩ resistor. Typical pull up voltage = 1.8V. |
VPU |
C3 |
I | GPIO push-pull mode Pull-up Voltage Pin. Connect VPU to the voltage to be used for the GPIO pins' push-pull mode functions. The pin can be left floating if GPIO pins' push-pull mode functions are not used. |
GPIO1 | D3 | I/O | General-purpose input/output pin 1 |
GPIO2 | D4 | I/O | General-purpose input/output pin 2 |
GPIO3 | E3 | I/O | General-purpose input/output pin 3 |
GPIO4 | E4 | I/O | General-purpose input/output pin 4 |
BKOUT | A2 | I | Output voltage sense pin for the internal feedback divider network of Buck. It also connects the output discharge circuit. Connect this pin to the Buck output capacitor with a short trace. |
BBOUT | F1 | P | Output voltage sense pin for the internal feedback divider network of Buck-boost. It also connects the output discharge circuit. Connect this pin to the Buck-boost output capacitor with a short trace. |
BKSW | A4 | P | Buck switch node. Connect the power inductor to this pin. |
BBSW1 | F4 | P | Buck-boost switch node. Connect the power inductor to this pin. |
BBSW2 | F2 | P |
Buck-boost switch node. Connect the power inductor to this pin. |
BKGND | A3 | G | Power ground of Buck. Connect this pin to the ground plane. |
BBGND | F3 | G | Power ground of Buck-boost. Connect this pin to the ground plane. |
MR | E2 | I | Manual reset input. MR is a push-button input that must be held low for greater than tRESET to assert the reset output. If MR is pressed for a shorter period, there are two programmable timer events, tWAKE1 and tWAKE2, that trigger an interrupt to the host. The MR input can also be used to bring the device out of Ship mode. |
TS | B4 | I | Battery pack NTC monitor. Connect TS to a 10-kΩ NTC thermistor in parallel to a 10-kΩ resistor. If TS function is not to be used, connect a 5-kΩ resistor from TS to ground. |
LSLDO1 | B1 | P | Output pin of LDO1. Connect the output capacitor from this pin to the ground plain. |
LSLDO2 | C1 | P | Output pin of LDO2. Connect the output capacitor from this pin to the ground plain. |
ADCIN | C4 | I | Input channel to the ADC. |
VINLS1 | B2 | P | Input pin of LDO1. Connect the intput capacitor from this pin to the ground plain. |
VINLS2 | C2 | P | Input pin of LDO2. Connect the intput capacitor from this pin to the ground plain. |