SLUSF40 October   2024 BQ25190

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Description (continued)
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Thermal Information
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
      1. 7.1.1 Battery Charging Process
        1. 7.1.1.1 Trickle Charge
        2. 7.1.1.2 Precharge
        3. 7.1.1.3 Fast Charge
        4. 7.1.1.4 Termination
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Input Voltage Based Dynamic Power Management (VINDPM)
      2. 7.3.2  Dynamic Power Path Management Mode (DPPM)
      3. 7.3.3  Battery Supplement Mode
      4. 7.3.4  Sleep Mode
      5. 7.3.5  SYS Power Control
        1. 7.3.5.1 SYS Pulldown Control
      6. 7.3.6  SYS Regulation
      7. 7.3.7  ILIM Control
      8. 7.3.8  Protection Mechanisms
        1. 7.3.8.1  Input Overvoltage Protection
        2. 7.3.8.2  System Short Protection
        3. 7.3.8.3  Battery Depletion Protection
          1. 7.3.8.3.1 Battery Undervoltage Lockout
        4. 7.3.8.4  Battery Overcurrent Protection
        5. 7.3.8.5  Safety Timer and Watchdog Timer
        6. 7.3.8.6  Buck Overcurrent Protection
        7. 7.3.8.7  LDO Overcurrent Protection
        8. 7.3.8.8  Buck-Boost Overcurrent Protection
        9. 7.3.8.9  Buck-Boost Output Short-Circuit Protection
        10. 7.3.8.10 Buck/Buck-Boost/LDO Undervoltage Lockout
        11. 7.3.8.11 Sequence Undervoltage Lockout
        12. 7.3.8.12 Thermal Protection and Thermal Regulation
      9. 7.3.9  Integrated 12-Bit ADC for Monitoring
        1. 7.3.9.1 ADC Programmable Comparators
      10. 7.3.10 Pushbutton Wake and Reset Input
        1. 7.3.10.1 Pushbutton Short Button Press or Wake Functions
        2. 7.3.10.2 Pushbutton Long Button Press Functions
      11. 7.3.11 VIN Pulse Detection for Hardware Reset
      12. 7.3.12 15-Second VIN Watchdog for Hardware Reset
      13. 7.3.13 Hardware Reset
      14. 7.3.14 Software Reset
      15. 7.3.15 Interrupt to Host (INT)
      16. 7.3.16 External NTC Monitoring (TS)
        1. 7.3.16.1 TS Thresholds
      17. 7.3.17 Power Rail Power Sequence
        1. 7.3.17.1 Power-Up Sequence
        2. 7.3.17.2 Power-Down Sequence
      18. 7.3.18 Integrated Buck Converter (Buck)
      19. 7.3.19 Integrated Buck-Boost Converter (Buck-boost)
      20. 7.3.20 Integrated LDOs (LDO1/LDO2)
      21. 7.3.21 Multi-Function GPIOs
        1. 7.3.21.1 GPIO1 Functions
        2. 7.3.21.2 GPIO2 Functions
        3. 7.3.21.3 GPIO3 Functions
        4. 7.3.21.4 GPIO4 Functions
    4. 7.4 Device Functional Modes
      1. 7.4.1 Ship Mode
        1. 7.4.1.1 LDO1-ON Ship Mode
      2. 7.4.2 Battery Mode
      3. 7.4.3 Adapter Mode
    5. 7.5 Programming
      1. 7.5.1 Serial Interface
        1. 7.5.1.1 Data Validity
        2. 7.5.1.2 START and STOP Conditions
        3. 7.5.1.3 Byte Format
        4. 7.5.1.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 7.5.1.5 Target Address and Data Direction Bit
        6. 7.5.1.6 Single Write and Read
        7. 7.5.1.7 Multi-Write and Multi-Read
    6. 7.6 Register Maps
      1. 7.6.1 BQ25190 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Capacitor Selection
        2. 8.2.2.2 Output Capacitor Selection
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 Recommended Passive Components
      3. 8.2.3 Application Performance Plots
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YBG|30
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.18 Integrated Buck Converter (Buck)

The device integrates a synchronous step-down converter (Buck) with ultra low quiescent current consumption. It supports DVS by either I2C or GPIO3/GPIO4. If BUCK_HI_RANGE is 0, the DVS range is from 0.4V to 1.575V in 12.5mV steps. If BUCK_HI_RANGE is 1, the DVS range is from 0.4V to 3.6V, with 25mV steps from 0.4V to 3.175V and 50mV steps from 3.2V to 3.6V. Note that the change to the BUCK_HI_RANGE takes effect the next time when the user programs the Buck output voltage with I2C command or GPIO3/GPIO4. GPIO3_CONFIG bits determine if DVS is controlled by I2C only or both I2C and GPIO. If GPIO3_CONFIG is set to b0010, DVS is controlled by both I2C and GPIO. Otherwiser, DVS is controlled by I2C only. If GPIO3_CONFIG is set to b0010 but GPIO4_CONFIG is not set to b0010, GPIO3 is configured to be VSEL pin to toggle between two output voltage settings. If GPIO3_CONFIG and GPIO4_CONFIG are both set to b0010, GPIO3 and GPIO4 are configured to be VSEL1 pin and VSEL2 pin to toggle between four output voltage settings. If DVS is configured to be controlled by I2C only, Buck output voltage is set by BUCK_VOUT_SET register. If GPIO3 is configured to be VSEL pin, the output voltage is determined by output voltage mode selection 1 and 2 which are set by BUCK_VOUT1_SET and BUCK_VOUT2_SET, depending on the state of GPIO3 pin as shown in Table 7-7. If GPIO3 and GPIO4 are configured to be VSEL1 pin and VSEL2 pin, the output voltage is determined by output voltage mode selection 1, 2, 3, and 4 which are programmed by BUCK_VOUT1_SET, BUCK_VOUT2_SET, BUCK_VOUT3_SET, or BUCK_VOUT4_SET repectively, depending on the state of GPIO3 pin and GPIO4 pin combination as shown in Table 7-8. When Buck DVS is controlled by both I2C and GPIO, the BUCK_VOUT1_SET/BUCK_VOUT2_SET/BUCK_VOUT3_SET/BUCK_VOUT4_SET bits are programmable by I2C to set the Buck output voltage while BUCK_VOUT_SET is automatically updated to match the active output voltage setting.

Table 7-7 Buck Output Voltage Setting by VSEL
VSEL (GPIO3) OUTPUT VOLTAGE MODE SELECTION
LOW 1
HIGH 2
Table 7-8 Buck Output Voltage Setting by VSEL1 and VSEL2
VSEL2 (GPIO4) VSEL1 (GPIO3) OUTPUT VOLTAGE MODE SELECTION
LOW LOW 1
LOW HIGH 2
HIGH LOW 3
HIGH HIGH 4

Buck has the output discharge function when it is being disabled. The purpose of this function is to ensure a defined down-ramp of the output voltage when it is disabled and to keep the output voltage close to 0V. The discharge function is only active when Buck is disabled.