SLUSF40 October   2024 BQ25190

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Description (continued)
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Thermal Information
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
      1. 7.1.1 Battery Charging Process
        1. 7.1.1.1 Trickle Charge
        2. 7.1.1.2 Precharge
        3. 7.1.1.3 Fast Charge
        4. 7.1.1.4 Termination
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Input Voltage Based Dynamic Power Management (VINDPM)
      2. 7.3.2  Dynamic Power Path Management Mode (DPPM)
      3. 7.3.3  Battery Supplement Mode
      4. 7.3.4  Sleep Mode
      5. 7.3.5  SYS Power Control
        1. 7.3.5.1 SYS Pulldown Control
      6. 7.3.6  SYS Regulation
      7. 7.3.7  ILIM Control
      8. 7.3.8  Protection Mechanisms
        1. 7.3.8.1  Input Overvoltage Protection
        2. 7.3.8.2  System Short Protection
        3. 7.3.8.3  Battery Depletion Protection
          1. 7.3.8.3.1 Battery Undervoltage Lockout
        4. 7.3.8.4  Battery Overcurrent Protection
        5. 7.3.8.5  Safety Timer and Watchdog Timer
        6. 7.3.8.6  Buck Overcurrent Protection
        7. 7.3.8.7  LDO Overcurrent Protection
        8. 7.3.8.8  Buck-Boost Overcurrent Protection
        9. 7.3.8.9  Buck-Boost Output Short-Circuit Protection
        10. 7.3.8.10 Buck/Buck-Boost/LDO Undervoltage Lockout
        11. 7.3.8.11 Sequence Undervoltage Lockout
        12. 7.3.8.12 Thermal Protection and Thermal Regulation
      9. 7.3.9  Integrated 12-Bit ADC for Monitoring
        1. 7.3.9.1 ADC Programmable Comparators
      10. 7.3.10 Pushbutton Wake and Reset Input
        1. 7.3.10.1 Pushbutton Short Button Press or Wake Functions
        2. 7.3.10.2 Pushbutton Long Button Press Functions
      11. 7.3.11 VIN Pulse Detection for Hardware Reset
      12. 7.3.12 15-Second VIN Watchdog for Hardware Reset
      13. 7.3.13 Hardware Reset
      14. 7.3.14 Software Reset
      15. 7.3.15 Interrupt to Host (INT)
      16. 7.3.16 External NTC Monitoring (TS)
        1. 7.3.16.1 TS Thresholds
      17. 7.3.17 Power Rail Power Sequence
        1. 7.3.17.1 Power-Up Sequence
        2. 7.3.17.2 Power-Down Sequence
      18. 7.3.18 Integrated Buck Converter (Buck)
      19. 7.3.19 Integrated Buck-Boost Converter (Buck-boost)
      20. 7.3.20 Integrated LDOs (LDO1/LDO2)
      21. 7.3.21 Multi-Function GPIOs
        1. 7.3.21.1 GPIO1 Functions
        2. 7.3.21.2 GPIO2 Functions
        3. 7.3.21.3 GPIO3 Functions
        4. 7.3.21.4 GPIO4 Functions
    4. 7.4 Device Functional Modes
      1. 7.4.1 Ship Mode
        1. 7.4.1.1 LDO1-ON Ship Mode
      2. 7.4.2 Battery Mode
      3. 7.4.3 Adapter Mode
    5. 7.5 Programming
      1. 7.5.1 Serial Interface
        1. 7.5.1.1 Data Validity
        2. 7.5.1.2 START and STOP Conditions
        3. 7.5.1.3 Byte Format
        4. 7.5.1.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 7.5.1.5 Target Address and Data Direction Bit
        6. 7.5.1.6 Single Write and Read
        7. 7.5.1.7 Multi-Write and Multi-Read
    6. 7.6 Register Maps
      1. 7.6.1 BQ25190 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Capacitor Selection
        2. 8.2.2.2 Output Capacitor Selection
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 Recommended Passive Components
      3. 8.2.3 Application Performance Plots
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YBG|30
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

VIN = 5V, VBAT = 3.6V, VBBOUT = 2.5V, VVINLS1/VVINLS2 = VLSLDO1/VLSLDO2 + 0.5V or 2V (whichever is greater), ILSLDO1/ILSLDO2 = 1mA, -40°C < TJ < 125°C and TJ = 30°C for typical values (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT CURRENTS
IQ_BAT Battery quiescent current in battery mode, ADC disabled VIN = 0V, VBAT = 3.6V, Buck disabled, Buck-boost disabled, LDO1 disabled, LDO2 disabled, ADC disabled, watchdog disabled, TJ =30°C 2 2.5 µA
VIN = 0V, VBAT = 3.6V, Buck disabled, Buck-boost disabled, LDO1 disabled, LDO2 disabled, ADC disabled, watchdog disabled, 0°C<TJ<85°C 2 4 µA
IQ_BAT_ADC Battery quiescent current in battery mode, ADC enabled VIN = 0V, VBAT = 3.6V, Buck disabled, Buck-boost disabled, LDO1 disabled, LDO2 disabled, ADC enabled, watchdog enabled, 0°C<TJ<85°C 350 µA
IQ_BAT_SHIP Battery quiescent current in ship mode  VIN = 0V, always-on LDO1 disabled, VBAT = 3.6V, 0°C<TJ<85°C  15 100 nA
IQ_IN Input supply quiescent current VIN = 5V, VBAT = 3.6V, Buck disabled, Buck-boost disabled, LDO1 disabled, LDO2 disabled, charge disabled, ADC disabled, SYSREG = 4.5V, TS_FAULT_VIN_EN = 0 0.68 1 mA
VIN = 5V, VBAT = 3.6V, Buck disabled, Buck-boost disabled, LDO1 disabled, LDO2 disabled, charge disabled, ADC disabled, SYS in pass-through mode, TS_FAULT_VIN_EN = 0 0.45 0.85 mA
ISLEEP_IN Sleep mode input current VIN = 3.6V, VBAT = 3.7V, Buck disabled, Buck-boost disabled, LDO1 disabled, LDO2 disabled, ADC disabled 25 µA
ISYS_SD SYS shutdown current Buck disabled, Buck-boost disabled, LDO1 disabled, LDO2 disabled, BATFET OFF, input FETs OFF, VSYS = 3.6V, -40℃< TJ<85℃ 90 800 nA
POWER-PATH MANAGEMENT AND INPUT
VIN_OP IN operating range 3 18 V
VIN_UVLOZ Exit IN undervoltage lock-out IN rising 3 V
VIN_UVLO Enter IN undervoltage lock-out IN falling 2.7 V
VIN_PORZ IN voltage threshold to enter ship mode IN falling 1.09 1.3 1.66 V
VSLEEPZ_HYST Exit Sleep mode threshold IN rising, VIN – VBAT, VBAT=4V 175 225 295 mV
VSLEEP_HYST Enter Sleep mode threshold IN falling, VIN – VBAT, VBAT=4V 60 90 125 mV
VIN_OVP IN overvoltage rising threshold IN rising, VIN_OVP = 0 5.5 5.7 5.9 V
VIN_OV_HYST IN overvoltage hysteresis  IN falling, VIN_OVP = 0 125 mV
VIN_OVP IN overvoltage rising threshold  IN rising, VIN_OVP = 1 18.2 18.5 18.8 V
VIN_OVPZ IN overvoltage falling threshold  IN falling, VIN_OVP = 1 17.7 18.0 18.3 V
IBAT_OCP BAT_OCP(Reverse OCP only) VBAT=3.6V, IBAT_OCP=b00 0.5 A
VBAT=3.6V, IBAT_OCP=b01 1 A
VBAT=3.6V, IBAT_OCP=b10 1.5 A
VBAT=3.6V, IBAT_OCP=b11 3.25 A
VBSUP1 Enter supplement mode threshold VBAT =3.6V, VBAT>VBATDEPL, VSYS<VBAT –VBSUP1 40 mV
VBSUP2 Exit supplement mode threshold VBAT =3.6V, VBAT>VBATDEPL, VSYS>VBAT –VBSUP2  20 mV
ILIM Input Current Limit VIN=5V, ILIM=90mA 80 90 98 mA
VIN=5V, ILIM=475mA 450 475 498 mA
VIN=5V, ILIM=1050mA 1005 1050 1100 mA
VINDPM Input voltage threshold when input current is reduced VINDPM=b00 4.2 V
VINDPM=b01 4.5 V
VINDPM=b10 4.7 V
VDPPM SYS voltage threshold when charge current is reduced VBAT=3.6V, VSYS=VDPPM+VBAT before charge current is reduced. 0.1 V
VSYS_REG_ACCURACY DC SYS regulation accuracy VIN = 5V, VBAT = 3.6V, ISYS = 100mA, SYS regulation target = 4.5V –2 2 %
VMINSYS Minimum SYS voltage when in battery tracking mode VBAT<3.6V 3.8 V
VSYS_TRACK Voltage regulation threshold for SYS when VBAT >3.6V VBAT=4V, VSYS=VBAT+VSYS_TRACK 225 mV
RSYS_PD SYS pull down resistance VSYS = 3.6V 20 Ω
VSYS_SHORT Falling voltage threshold for triggering SYS_SHORT protection 840 mV
VSYS_SHORTZ Rising voltage threshold for recovering from SYS_SHORT protection 1.08 V
VSEQ_UVLOZ Exit sequence undervoltage lock-out SYS rising, when power sequence is used 1.8 1.95 2.1 V
VSEQ_UVLO Enter sequence undervoltage lock-out SYS falling, when power sequence is used 1.7 1.85 2 V
BATTERY CHARGER
RON_BAT BATFET on-resistance VBAT = 4.5V, IBAT = 500mA 55 90 mΩ
RON_IN Input FET on-resistance VIN = 5V, IIN = 1A 270 470 mΩ
VDO Dropout voltage (VSYS - VBAT) VBAT = 4.2V, ICHG = 500mA 300 mV
VREG_RANGE Typical BAT charge voltage regulation range 10mV steps, programmabe through I2C 3.5 4.65 V
VREG_ACC Charge voltage accuracy –0.5 0.5 %
ICHG_RANGE Typical charge current regulation range VOUT > VLOWV  5 1000 mA
ICHG_ACC Charge current accuracy ICHG = 40mA 36 40 44 mA
ICHG = 90mA 81 90 99 mA
ICHG = 90 mA, 0°C< TJ < 85°C 85.5 90 94.5 mA
ICHG = 900mA 810 900 990 mA
IPRECHG_ACC Precharge current accuracy ICHG = 90 mA, IPRECHG = 20% ICHG 16.2 18 19.8 mA
ITERM_ACC Termination current accuracy ITERM = 30 mA, ITERM = 10% ICHG, TJ = 30°C 2.6 3 3.3 mA
VLOWV Pre-charge to fast-charge transition threshold VLOWVSEL = 3.0V, VBAT rising 2.9 3 3.1 V
VLOWVSEL = 2.8V, VBAT rising 2.7 2.8 2.9 V
VLOWV_HYST Battery LOWV hysteresis 100 mV
VBATDEPLZ Battery depletion threshold, VBAT rising BATDEPL = b000, VIN = 0V 3.05 3.15 3.25 V
VBATDEPL Battery depletion threshold, VBAT falling BATDEPL = b000, VIN = 0V 2.9 3 3.1 V
VBATDEPL_HYST Battery depletion threshold hysteresis, VBAT rising 150 mV
VBUVLOZ Battery UVLO, VBAT rising 2.4 2.5 2.6 V
VBUVLO Battery UVLO, VBAT falling 2.0 2.1 2.2 V
VBAT_ADC_LOWVZ Minimum battery voltage for ADC operation in battery mode  2.4 V
VRECHG Battery recharge threshold below regulation voltage BAT falling, VRECHG = 0 100 mV
BAT falling, VRECHG = 1 200 mV
VBATSC Short on battery threshold for trickle charge, VBAT rising 1.8 V
VBATSC_HYST Battery short circuit voltage hysteresis 200 mV
IBATSC Trickle charge current  VBAT<VBATSC, IBATSC = 0 8 mA
VBAT<VBATSC, IBATSC = 1 1 mA
BUCK
VOUT_BUCK Buck output voltage range BUCK_HI_RANGE = 0 0.4 1.575 V
BUCK_HI_RANGE = 1 0.4 3.6 V
VBUCK_UVLOZ Buck exit undervoltage lock-out VSYS rising 1.75 1.8 V
VBUCK_UVLO Buck enter undervoltage lock-out VSYS falling 1.65 1.7 V
IQ_BUCK_ON SYS current when only Buck is enabled Non-switching, Buck enabled, ILOAD_BUCK = 0 A, VOUT_BUCK = 0.7V, Buck-boost disabled, LDO1 disabled, LDO2 disabled, BATFET OFF, input FETs OFF, Buck PGOOD function disabled, VSYS = 3.6V, –40℃ ≤ TJ ≤ 85℃ 360 3200 nA
Switching, Buck1 enabled, ILOAD_BUCK = 0 A, VOUT_BUCK = 0.7V, Buck-boost disabled, LDO1 disabled, LDO2 disabled, BATFET OFF, input FETs OFF, Buck PGOOD function disabled, VSYS = 3.6V 435 nA
VOUT_ACC_BUCK DC output voltage accuracy PWM operation, –40℃ ≤ TJ ≤ 125℃ -1.5 +1.5 %
RDSON_HS_BUCK High-side MOSFET on-resistance IBKOUT = 300 mA, VSYS = 3.6V 170 mΩ
RDSON_LS_BUCK Low-side MOSFET on-resistance IBKOUT = 300 mA, VSYS = 3.6V 70 mΩ
IHSOC_BUCK High-side peak current limit  Peak current limit on HS FET 0.9 1.1 1.3 A
ILSOC_BUCK Low-side valley current limit  Valley current limit on LS FET 0.8 1.0 1.1 A
RPD_BUCK Output discharge resistor on BKOUT pin Buck disabled, IOUT_BUCK = -10mA 7 Ω
VBUCK_PGTH Buck power good threshold VBKOUT rising  93% Vtarget
VBUCK_PGTHZ Buck power good threshold VBKOUT falling  90% Vtarget
BUCK-BOOST
VOUT_BB Buck-boost output voltage range 1.7 5.2 V
IQ_IN_BB_ON SYS current when only Buck-boost is enabled  Buck-boost enabled, no load, not switching, "unlimited" current setting, Buck disabled, LDO1 disabled, LDO2 disabled, BATFET OFF, input FETs OFF, Buck-boost PGOOD function disabled, VSYS = 3.6V, -40℃< TJ<85℃ 105 2050 nA
VBB_UVLOZ Buck-boost exit undervoltage lock-out VSYS rising 1.70 1.75 1.80 V
VBB_UVLO_HYST UVLO threshold voltage hysteresis 90 100 110 mV
VOUT_ACC_BB Buck-boost output voltage DC accuracy IBBOUT = 1 mA -1.5 1.5 %
RDSON_BBBK_HS Buck-boost buck bridge high-side MOSFET on resistance VSYS = 3V, VBBOUT = 5V, test current = 1A  155 mΩ
RDSON_BBBK_LS Buck-boost buck bridge low-side MOSFET on resistance VSYS = 3V, VBBOUT = 3V, test current = 1A  110 mΩ
RDSON_BBBST_LS Buck-boost boost bridge low-side MOSFET on resistance VSYS = 3V, VBBOUT = 3V, test current = 1A  110 mΩ
RDSON_BBBST_HS Buck-boost boost bridge high-side MOSFET on resistance VSYS = 5V, VBBOUT = 3V, test current = 1A 155 mΩ
IOC_SS_BB Peak current limit during startup VSYS = 3.6V, unlimited curent limit setting 0.6 A
IOC_BB Peak current limit VSYS = 1.8V, VBBOUT = 3.6V, unlimited current limit setting 1.43 1.55 1.7 A
VSYS = 1.8V, VBBOUT = 3.6V, 100mA current limit setting 0.15 0.29 0.51 A
RPD_BB Output discharge resistor on BBOUT pin Buck-boost disabled, IOUT_BB = -10mA 7 Ω
VBB_PGTH Buck-boost power good threshold VBBOUT rising  93% Vtarget
VBB_PGTHZ Buck-boost power good threshold VBBOUT falling  90% Vtarget
LDO1
VIN_LDO1 LDO1 input voltage range 1.5 6 V
VOUT_LDO1 LDO1 output voltage range in LDO mode 0.8 3.6 V
IQ_LDO1 LDO1 quiescent current TJ = 30℃, ILSLDO1 = 0 mA, LDO1 PGOOD function disabled, LDO1 in LDO mode, VVINLS1 = 3.6V 25 46 nA
–40℃ ≤ TJ ≤ 85℃, ILSLDO1 = 0 mA, LDO1 PGOOD function disabled, LDO1 in LDO mode, VVINLS1 = 3.6V 60 nA
ISD_LDO1 Shutdown current LDO1 disabled, 1.5V ≤ VVINLS1 ≤ 5.0V, TJ = 30℃ 3 10 nA
ΔVOUT_LDO1(ΔVIN_LDO1) Line regulation VLSLDO1(nom) + 0.5V ≤ VVINLS1 ≤ 6V(1) 5 mV
VOUT_ACC_LDO1 Output voltage accuracy over temperature VLSLDO1 ≥ 1.5V -2 2 %
VLSLDO1 < 1.5V -30 30 mV
ΔVOUT_LDO1(ΔIOUT_LDO1) Load regulation(2) –40℃ ≤ TJ ≤ 85℃, 1 mA ≤ ILSLDO1 ≤ 200 mA, VVINLS1 = VLSLDO1(nom) + 0.5V(1) 20 38 mV
–40℃ ≤ TJ ≤ 125℃, 1 mA ≤ ILSDO1 ≤ 200 mA, VVINLS1 = VLSLDO1(nom) + 0.5V(1) 50 mV
ICL_LDO1 Output current limit VLSLDO1 = 90% × VLSLDO1(nom), VLSLDO1 < 2.5V, VVINLS1 = VLSLDO1(nom) + VDO_LDO1(max) + 1V 340 550 850 mA
VLSLDO1 = 90% × VLSLDO1(nom), VLSLDO1 ≥ 2.5V, VVINLS1 = VLSLDO1(nom) + VDO_LDO1(max) + 0.5V 340 550 850 mA
ISC_LDO1 Short-circuit current limit VLSLDO1 = 0V 80 mA
VDO_LDO1 Dropout voltage(3) –40℃ ≤ TJ ≤ 125℃, 1.8V ≤ VLSLDO1 < 2.5V 450 mV
–40℃ ≤ TJ ≤ 125℃, 3.3V ≤ VLSLDO1 ≤ 3.6V 310 mV
VLDO1_UVLOZ LDO1 exit undervoltage lock-out VVINLS1 rising 1 1.35 1.7 V
VLDO1_UVLO LDO1 enter undervoltage lock-out VVINLS1 falling 0.85 1.19 1.35 V
RPD_LDO1 Output pulldown resistance VLSLDO1 = 3.3V, LDO1 disabled 60 Ω
VLDO1_PGTH LDO1 power good threshold VLSLDO1 rising 93% Vtarget
VLDO1_PGTHZ LDO1 power good threshold VLSLDO1 falling 90% Vtarget
LDO2
VIN_LDO2 LDO2 input voltage range 1.5 6 V
VOUT_LDO2 LDO2 output voltage range 0.8 3.6 V
IQ_LDO2 LDO2 quiescent current TJ = 30℃, ILSLDO2 = 0 mA, LDO2 PGOOD function disabled, LDO2 in LDO mode, VVINLS2 = 3.6V 25 46 nA
–40℃ ≤ TJ ≤ 85℃, ILSLDO2 = 0 mA, LDO2 PGOOD function disabled, LDO2 in LDO mode, VVINLS2 = 3.6V 60 nA
ISD_LDO2 Shutdown current LDO2 disabled, 1.5V ≤ VVINLS2 ≤ 5.0V, TJ = 30℃ 3 10 nA
ΔVOUT_LDO2(ΔVIN_LDO2) Line regulation VLSLDO2(nom) + 0.5V ≤ VVINLS2 ≤ 6V(4) 5 mV
VOUT_ACC_LDO2 Output voltage accuracy over temperature VLSLDO2 ≥ 1.5V -2 2 %
VLSLDO2 < 1.5V -30 30 mV
ΔVOUT_LDO2(ΔIOUT_LDO2) Load regulation(5) –40℃ ≤ TJ ≤ 85℃, 1 mA ≤ ILSLDO2 ≤ 200 mA, VVINLS2 = VLSLDO2(nom) + 0.5V(4) 20 38 mV
–40℃ ≤ TJ ≤ 125℃, 1 mA ≤ ILSDO2 ≤ 200 mA, VVINLS2 = VLSLDO2(nom) + 0.5V(4) 50 mV
ICL_LDO2 Output current limit VLSLDO2 = 90% × VLSLDO2(nom), VLSLDO2 < 2.5V, VVINLS2 = VLSLDO2(nom) + VDO_LDO2(max) + 1V 340 550 850 mA
VLSLDO2 = 90% × VLSLDO2(nom), VLSLDO2 ≥ 2.5V, VVINLS2 = VLSLDO2(nom) + VDO_LDO2(max) + 0.5V 340 550 850 mA
ISC_LDO2 Short-circuit current limit VLSLDO2 = 0V 80 mA
VDO_LDO2 Dropout voltage(6) –40℃ ≤ TJ ≤ 125℃, 1.8V ≤ VLSLDO2 < 2.5V 450 mV
–40℃ ≤ TJ ≤ 125℃, 3.3V ≤ VLSLDO2 ≤ 3.6V 310 mV
VLDO2_UVLOZ LDO2 exit undervoltage lock-out VVINLS2 rising 1 1.35 1.7 V
VLDO2_UVLO LDO2 enter undervoltage lock-out VVINLS2 falling 0.85 1.19 1.35 V
RPD_LDO2 Output pulldown resistance VLSLDO2 = 3.3V, LDO2 disabled 60 Ω
VLDO2_PGTH LDO2 power good threshold VLSLDO2 rising 93% Vtarget
VLDO2_PGTHZ LDO2 power good threshold VLSLDO2 falling 90% Vtarget
TERMPERATURE REGULATION AND TEMPERATURE SHUTDOWN
TREG Typical junction temperature regulation THERM_REG = b00 100 °C
THERM_REG = b01 80 °C
THERM_REG = b10 60 °C
TSHUT_RISING Charger thermal shutdown rising threshold Temperature rising 150 °C
TSHUT_FALLING Charger thermal shutdown falling threshold Temperature falling 135 °C
TSHUT_RISING_LDO1 LDO1 thermal shutdown rising threshold  Temperature rising 170 ℃
TSHUT_FALLING_LDO1 LDO1 thermal shutdown falling threshold  Temperature falling 145 ℃
TSHUT_RISING_LDO2 LDO2 thermal shutdown rising threshold  Temperature rising 170 ℃
TSHUT_RISING_BUCK Buck thermal shutdown rising threshold  Temperature rising 160 ℃
TSHUT_RISING_BB Buck-boost thermal shutdown rising threshold  Temperature rising 150 ℃
BATTERY NTC MONITOR
VHOT High temperature threshold (43℃) VTS falling, 0°C < TJ < 85°C 0.272(7) 0.276 0.280(7) V
VCOLD Cold temperature threshold (0℃) VTS rising, 0°C < TJ < 85°C 0.576(7) 0.580 0.584(7) V
VNTC_HYST Threshold hysteresis 20 mV
VTS_OPEN TS open threshold VTS rising, 0°C < TJ < 85°C 0.9 V
ITS_BIAS TS bias current 76.8 80 83.2 µA
VTS_CLAMP TS clamp voltage TS open-circuit (float), VIN = 5V 1.2 1.5 1.8 V
PUSH BUTTON TIMERS
tWAKE1 WAKE1 timer. Time from /MR falling edge to INT being asserted. WAKE1_TMR = 0 125 ms
WAKE1_TMR = 1 500 ms
tWAKE2 WAKE2 timer. Time from /MR falling edge to INT being asserted. WAKE2_TMR = 0 1 s
WAKE2_TMR = 1 2 s
tLPRESS_WARN RESET_WARN timer. Time prior to long press action 1 s
tLPRESS Long press timer. Time from /MR falling edge to long press action MR_LPRESS = b00 5 s
MR_LPRESS = b01 10 s
MR_LPRESS = b10 15 s
MR_LPRESS = b11 20 s
tRESTART(AUTOWAKE) RESTART timer. Time from HW Reset to SYS power up AUTOWAKE = b00 0.5 s
AUTOWAKE = b01 1 s
AUTOWAKE = b10 2 s
AUTOWAKE = b11 4 s
tSHIPWAKE Wake timer to count for ship mode exit 1 s
BATTERY CHARGING TIMERS
tMAXCHG Charge safety timer Programmable range 180 720 min
tSFTMR_ACC Safety timer accuracy –10 10 %
tPRECHG Precharge safety timer 0.25 * tMAXCHG
ADC MEASUREMENT ACCURACY AND PERFORMANCE
tADC_CONV Conversion-time, each measurement ADC_SAMPLE = b00 24 ms
ADC_SAMPLE = b01 12 ms
ADC_SAMPLE = b10 6 ms
ADC_SAMPLE = b11 6 ms
ADC_RES Effective resolution ADC_SAMPLE = b00 11 12 bits
ADC_SAMPLE = b01 10 11 bits
ADC_SAMPLE = b10 9 10 bits
ADC_SAMPLE = b11 9 10 bits
ADC MEASUREMENT RANGE AND LSB
IIN_ADC ADC IIN reading  Range  0 1.1 A
LSB 0.5 mA
VIN_ADC ADC VIN reading (VIN_OVP=0) Range 0 6 V
LSB 1.5 mV
ADC VIN reading (VIN_OVP=1) Range 0 20 V
LSB 5 mV
VBAT_ADC ADC VBAT reading  Range 0 5 V
LSB 1.25 mV
VSYS_ADC ADC VSYS reading  Range 0 5 V
LSB 1.25 mV
IBAT_ADC ADC IBAT reading Range  -3 1 A
LSB 1 mA
TS_ADC ADC VTS reading  Range 0 1 V
LSB 0.25 mV
TDIE_ADC ADC TDIE reading Range –40 125 °C
LSB 0.5 °C
ADCIN_ADC ADC ADCIN voltage reading, ADCIN_MODE = 0   Range 0 5 V
LSB 1.25 mV
ADC ADCIN voltage reading, ADCIN_MODE = 1   Range 0 1 V
LSB 0.25 mV
I2C INTERFACE
VIL_SDA_SCL Input low threshold level, SDA and SCL 0.42 V
VIH_SDA_SCL Input high threshold level, SDA and SCL 0.78 V
VOL_SDA Output low threshold level, SDA 5 mA sink current, 1.2V VPULLUP 0.3 V
ILKG_SDA_SCL High-level leakage current, SDA and SCL VPULLUP = 1.8V 1 µA
CBUS Capacitive load for each bus line 550 pF
MR INPUT PIN
RPU_MR Internal pull up resistance 140 kΩ
VIL_MR MR input low threshold level 0.3 V
INT OUTPUT PIN
VOL_INT Output low threshold level 5mA sink current 0.3 V
ILKG_INT High-level leakage current VPULLUP = 1.8V 1 μA
CE INPUT PIN
RPD_CE Internal pull-down resistance, CE 5 MΩ
VIL_CE Input low threshold level, CE 0.4 V
VIH_CE Input high threshold level, CE 0.78 V
IIN_BIAS_CE High-level leakage current, CE VPULLUP = 1.8V 1 µA
GPIO1/GPIO2/GPIO3/GPIO4
VIL_GPIO Input low threshold level, GPIO1/GPIO2/GPIO3/GPIO4 0.4 V
VIH_GPIO Input high threshold level, GPIO1/GPIO2/GPIO3/GPIO4 0.78 V
VOL_GPIO Output low threshold level, GPIO1/GPIO2/GPIO3/GPIO4 5 mA sink current 0.3 V
VOH_GPIO_PP Output high level in push-pull mode, GPIO1/GPIO2/GPIO3/GPIO4 0.5 mA output current, VVPU =1.8V 0.8×VVPU V
fGPIO4_PWM GPIO4 frequency in PWM output mode 1 kHz
ILKG_GPIO High-level leakage current, GPIO1/GPIO2/GPIO3/GPIO4 GPIO1/GPIO2/GPIO3/GPIO4 in forced open-drain high mode, VPULLUP = 1.8V 1 µA
(1) VVINLS1 = 2.0 V for VLSLDO1 ≤ 1.5 V
(2) Load Regulation is normalized to the output voltage at ILDOLS1 = 1 mA.
(3) Dropout is measured by ramping VVINLS1 down until VLSLDO1 = VLSLDO1 (nom) x 95%, with ILSLDO1 = 200 mA
(4) VVINLS2 = 2.0 V for VLSLDO2 ≤ 1.5 V
(5) Load Regulation is normalized to the output voltage at ILDOLS2 = 1 mA.
(6) Dropout is measured by ramping VVINLS2 down until VLSLDO2 = VLSLDO2 (nom) x 95%, with ILSLDO2 = 200 mA
(7) Based on Characterization Data