SLUSBJ3F August   2013  – March 2019

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
      2.      Charger Efficiency
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Maximum Power Point Tracking
      2. 7.3.2 Battery Undervoltage Protection
      3. 7.3.3 Battery Overvoltage Protection
      4. 7.3.4 Battery Voltage in Operating Range (VBAT_OK Output)
      5. 7.3.5 Push-Pull Multiplexer Drivers
      6. 7.3.6 Nano-Power Management and Efficiency
    4. 7.4 Device Functional Modes
      1. 7.4.1 Main Boost Charger Disabled (Ship Mode) - (VSTOR > VSTOR_CHGEN and EN = HIGH)
      2. 7.4.2 Cold-Start Operation (VSTOR < VSTOR_CHGEN, VIN_DC > VIN(CS) and PIN > PIN(CS))
      3. 7.4.3 Main Boost Charger Enabled (VSTOR > VSTOR_CHGEN, VIN_DC > VIN(DC) and EN = LOW )
      4. 7.4.4 Thermal Shutdown
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Energy Harvester Selection
      2. 8.1.2 Storage Element Selection
      3. 8.1.3 Inductor Selection
      4. 8.1.4 Capacitor Selection
        1. 8.1.4.1 VREF_SAMP Capacitance
        2. 8.1.4.2 VIN_DC Capacitance
        3. 8.1.4.3 VSTOR Capacitance
        4. 8.1.4.4 Additional Capacitance on VSTOR or VBAT_SEC
    2. 8.2 Typical Applications
      1. 8.2.1 Solar Application Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Performance Plots
      2. 8.2.2 TEG Application Circuit
      3. 8.2.3 Design Requirements
        1. 8.2.3.1 Detailed Design Procedure
        2. 8.2.3.2 Application Performance Plots
      4. 8.2.4 Piezoelectric Application Circuit
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
        3. 8.2.4.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Zip Files
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

Over recommended temperature range, typical values are at TA = 25°C. Unless otherwise noted, specifications apply for conditions of VSTOR = 4.2 V. External components, CIN = 4.7 µF, L1 = 22 µH, CSTOR= 4.7 µF
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
BOOST CHARGER
VIN(DC) DC input voltage into VIN_DC Cold-start completed 100 5100 mV
ICHG(CBC_LIM) Cycle-by-cycle current limit of charger 0.5V < VIN < 4.0 V; VSTOR = 4.2 V 230 285 mA
PIN Input power range for normal charging VBAT_OV > VSTOR > VSTOR_CHGEN 0.005 510 mW
VIN(CS) Minimum input voltage for cold start circuit to start charging VSTOR VBAT_SEC < VBAT_UV; VSTOR = 0 V;
0°C < TA < 85°C		 600 700 mV
VSTOR_CHGEN Voltage on VSTOR when cold start operation ends and normal charger operation commences 1.6 1.73 1.9 V
PIN(CS) Minimum cold-start input power for VSTOR to reach VSTOR(CHGEN) and allow normal charging to commence VSTOR < VSTOR(CHGEN)and VIN_DC clamped to VIN(CS) by cold start circuit; VBAT with 100 µF ceramic capacitor 15 µW
tBAT_HOT_PLUG  Time for which switch between VSTOR and VBAT_SEC closes when battery is hot plugged into VBAT_SEC  Battery resistance = 300 Ω, Battery voltage = 3.3V  50 ms
QUIESCENT and LEAKAGE CURRENTS
IQ EN = GND - Full operating mode VIN_DC = 0V; VSTOR = 2.1V;
TJ = 25°C		 325 400 nA
VIN_DC = 0V; VSTOR = 2.1V;
–40°C < TJ < 85°C		 700
EN = VBAT_SEC - Ship mode VBAT_SEC = VBAT_PRI = 2.1 V;
TJ = 25°C; VSTOR = VIN_DC = 0 V		 1 5
VBAT_SEC = VBAT_PRI = 2.1 V;
–40°C < TJ < 85°C;
VSTOR = VIN_DC = 0 V		 20
I-BATPRI(LEAK) EN = VBAT_SEC - Ship mode VBAT_PRI = VBAT_SEC = 2.1 V;
TJ = 25°C; VIN_DC = 0 V; VSTOR floating		 1 5 nA
VBAT_PRI = VBAT_SEC = 2.1 V;
–40°C < TJ < 85°C;
VIN_DC = 0 V; VSTOR floating		 20 nA
MOSFET RESISTANCES
RDS(ON)-BAT  ON resistance of switch between VBAT_SEC and VSTOR VBAT_SEC = 4.2 V 0.95 1.50 Ω
RDS(ON)_CHG Charger low-side switch ON resistance VBAT_SEC = 4.2 V 0.70 0.90 Ω
Charger high-side switch ON resistance 2.30 3.00 Ω
Charger low-side switch ON resistance VBAT_SEC = 2.1 V 0.80 1.00 Ω
Charger high-side switch ON resistance 3.70 4.80 Ω
fSW Maximum charger switching frequency 1.0 MHz
TTEMP_SD  Junction temperature when charging is discontinued VBAT_OV > VSTOR > 1.8V 125 °C
BATTERY MANAGEMENT
VBAT_OV  Programmable voltage range for overvoltage threshold VBAT_SEC increasing 2.2  5.5 V
VBAT_OV_HYST Battery overvoltage hysteresis (internal) VBAT_SEC decreasing; VBAT_OV = 5.25V    24 45 mV
VDELTA VBAT_OV - VIN(DC) Main boost charger on; MPPT not sampling VOC 400 mV
VBAT_UV Undervoltage threshold VBAT_SEC decreasing 1.91 1.95 2 V
VBAT_UV_HYST Battery undervoltage hysteresis (internal) VBAT_SEC increasing 15 32 mV
VBAT_OK_HYST Programmable voltage range of digital signal indicating VSTOR (=VBAT_SEC) is OK VBAT_SEC increasing VBAT_UV VBAT_ OV V
VBAT_OK_PROG  Programmable voltage range of digital signal indicating VSTOR (=VBAT_SEC) is OK VBAT_SEC decreasing VBAT_UV VBAT_OK_
HYST – 50		 mV
VBAT_ACCURACY Overall Accuracy for threshold values VBAT_OV, VBAT_OK Selected resistors are 0.1% tolerance -2% 2%
VBAT_OK(H) VBAT_OK (High) threshold voltage Load = 10 µA VSTOR – 200 mV
VBAT_OK(L) VBAT_OK (Low) threshold voltage Load = 10 µA 100 mV
ENABLE THRESHOLDS
EN(H) Voltage for EN high setting. Relative to VBAT_SEC. VBAT_SEC = 4.2V VBAT_SEC – 0.2 V
EN(L) Voltage for EN low setting VBAT_SEC = 4.2V 0.3 V
BIAS and MPPT CONTROL STAGE
VOC_SAMPLE Time period between two MPPT samples 16 s
VOC_STLG Settling time for MPPT sample measurement of VIN_DC open circuit voltage Device not switching 256 ms
VIN_REG Regulation of VIN_DC during charging 0.5 V < VIN < 4 V; IIN(DC) = 10 mA 10%
MPPT_80 Voltage on VOC_SAMP to set MPPT threshold to 0.80 of open circuit voltage of VIN_DC VSTOR – 0.015 V
MPPT_50 Voltage on VOC_SAMP to set MPPT threshold to 0.50 of open circuit voltage of VIN_DC 15 mV
VBIAS Internal reference for the programmable voltage thresholds VSTOR ≥ VSTOR_CHGEN 1.205 1.21 1.217 V
MULTIPLEXER
tDEAD Dead time between VB_SEC_ON and VB_PRI_ON 5 8(1) us
(1) Specified by design.