SLUSCJ4B June 2017 – March 2022 BQ25600 , BQ25600D
PRODUCTION DATA
| Bit | Field | POR | Type | Reset | Description | Comment |
|---|---|---|---|---|---|---|
| 7 | EN_TERM | 1 | R/W | by REG_RST by Watchdog | 0 – Disable 1 – Enable | Default: Enable termination (1) |
| 6 | OVPFET_DIS | 0 | R/W | by REG_RST by Watchdog | 0 – Enable OVPFET 1 – Disable OVPFET | Default: Enable OVPFET (0) Note: This bit only takes effect when EN_HIZ bit is active |
| 5 | WATCHDOG[1] | 0 | R/W | by REG_RST by Watchdog | 00 – Disable timer, 01 – 40 s, 10 – 80 s,11 – 160 s | Default: 40 s (01) |
| 4 | WATCHDOG[0] | 1 | R/W | by REG_RST by Watchdog | ||
| 3 | EN_TIMER | 1 | R/W | by REG_RST by Watchdog | 0 – Disable 1 – Enable both fast charge and precharge timer | Default: Enable (1) |
| 2 | CHG_TIMER | 1 | R/W | by REG_RST by Watchdog | 0 – 5 hrs 1 – 10 hrs | Default: 10 hours (1) |
| 1 | TREG | 1 | R/W | by REG_RST by Watchdog | Thermal Regulation Threshold: 0 – 90°C 1 – 110°C | Default: 110°C (1) |
| 0 | JEITA_ISET (0C-10C) | 1 | R/W | by REG_RST by Watchdog | 0 – 50% of ICHG 1 – 20% of ICHG | Default: 20% (1) |
| LEGEND: R/W = Read/Write; R = Read only |