SLUSCK5A March 2017 – March 2023 BQ25601
PRODUCTION DATA
Bit | Field | POR | Type | Reset | Description |
---|---|---|---|---|---|
7 | REG_RST | 0 | R/W | NA | Register reset 0 – Keep current register setting 1 – Reset to default register value and reset safety timer Note: Bit resets to 0 after register reset is completed |
6 | PN[3] | x | R | NA | BQ25601 : 0010 |
5 | PN[2] | x | R | NA | |
4 | PN[1] | x | R | NA | |
3 | PN[0] | x | R | NA | |
2 | Reserved | x | R | NA | |
1 | DEV_REV[1] | x | R | NA | |
0 | DEV_REV[0] | x | R | NA |
LEGEND: R/W = Read/Write; R = Read only |