SLUSCK5A March 2017 – March 2023 BQ25601
PRODUCTION DATA
Bit | Field | POR | Type | Reset | Description | Comment |
---|---|---|---|---|---|---|
7 | BOOST_LIM | 1 | R/W | by REG_RST by Watchdog | 0 – 0.5 A 1 – 1.2 A | Default: 1.2 A (1) Note: The current limit options listed are minimum current limit specs. |
6 | Q1_FULLON | 0 | R/W | by REG_RST | 0 – Use higher Q1 RDSON when programmed IINDPM < 700mA (better accuracy) 1 – Use lower Q1 RDSON always (better efficiency) | In boost mode, full FET is always used and this bit has no effect |
5 | ICHG[5] | 1 | R/W | by REG_RST by Watchdog | 1920 mA | Fast Charge Current Default: 2040 mA (100010) Range: 0 mA (0000000) – 3000 mA (110010) Note: ICHG = 0 mA disables charge. ICHG > 3000 mA (110010 clamped to register value 3000 mA (110010)) |
4 | ICHG[4] | 0 | R/W | by REG_RST by Watchdog | 960 mA | |
3 | ICHG[3] | 0 | R/W | by REG_RST by Watchdog | 480 mA | |
2 | ICHG[2] | 0 | R/W | by REG_RST by Watchdog | 240 mA | |
1 | ICHG[1] | 1 | R/W | by REG_RST by Watchdog | 120 mA | |
0 | ICHG[0] | 0 | R/W | by REG_RST by Watchdog | 60 mA |
LEGEND: R/W = Read/Write; R = Read only |