SLUSDA2B
July 2018 ā February 2022
BQ25601D
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Device Comparison Table
7
Pin Configuration and Functions
8
Specifications
8.1
Absolute Maximum Ratings
8.2
ESD Ratings
8.3
Recommended Operating Conditions
8.4
Thermal information
8.5
Electrical Characteristics
8.6
Timing Requirements
8.7
Typical Characteristics
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Power-On-Reset (POR)
9.3.2
Device Power Up from Battery without Input Source
9.3.3
Power Up from Input Source
9.3.3.1
Power Up REGN Regulation
9.3.3.2
Poor Source Qualification
9.3.3.3
Input Source Type Detection
9.3.3.3.1
D+/Dā Detection Sets Input Current Limit in BQ25601D
9.3.3.4
Input Voltage Limit Threshold Setting (VINDPM Threshold)
9.3.3.5
Converter Power-Up
9.3.4
Boost Mode Operation From Battery
9.3.5
Host Mode and Standalone Power Management
9.3.5.1
Host Mode and Default Mode in BQ25601D
9.3.6
Power Path Management
9.3.7
Battery Charging Management
9.3.7.1
Autonomous Charging Cycle
9.3.7.2
Battery Charging Profile
9.3.7.3
Charging Termination
9.3.7.4
Thermistor Qualification
9.3.7.5
JEITA Guideline Compliance During Charging Mode
9.3.7.6
Boost Mode Thermistor Monitor During Battery Discharge Mode
9.3.7.7
Charging Safety Timer
9.4
Device Functional Modes
9.4.1
Narrow VDC Architecture
9.4.2
Dynamic Power Management
9.4.3
Supplement Mode
9.4.4
Shipping Mode and QON Pin
9.4.4.1
BATFET Disable Mode (Shipping Mode)
9.4.4.2
BATFET Enable (Exit Shipping Mode)
9.4.4.3
BATFET Full System Reset
9.4.4.4
QON Pin Operations
9.4.5
Status Outputs ( PG, STAT, INT )
9.4.5.1
Power Good Indicator ( PGPin PG_STAT Bit)
9.4.5.2
Charging Status indicator (STAT)
9.4.5.3
Interrupt to Host ( INT)
9.5
Protections
9.5.1
Voltage and Current Monitoring in Converter Operation
9.5.1.1
Voltage and Current Monitoring in Buck Mode
9.5.1.1.1
Input Overvoltage (ACOV)
9.5.1.1.2
System Overvoltage Protection (SYSOVP)
9.5.2
Voltage and Current Monitoring in Boost Mode
9.5.2.1
VBUS Soft Start
9.5.2.2
VBUS Output Protection
9.5.2.3
Boost Mode Overvoltage Protection
9.5.3
Thermal Regulation and Thermal Shutdown
9.5.3.1
Thermal Protection in Buck Mode
9.5.3.2
Thermal Protection in Boost Mode
9.5.4
Battery Protection
9.5.4.1
Battery Overvoltage Protection (BATOVP)
9.5.4.2
Battery Over-Discharge Protection
9.5.4.3
System Over-Current Protection
9.6
Programming
9.6.1
Serial Interface
9.6.1.1
Data Validity
9.6.1.2
START and STOP Conditions
9.6.1.3
Byte Format
9.6.1.4
Acknowledge (ACK) and Not Acknowledge (NACK)
9.6.1.5
Slave Address and Data Direction Bit
9.6.1.6
Single Read and Write
9.6.1.7
Multi-Read and Multi-Write
9.7
Register Maps
9.7.1
REG00 (address = 00) [reset = 00010111]
9.7.2
REG01 (address = 01) [reset = 00011010]
9.7.3
REG02 (address = 02) [reset = 10100 010]
9.7.4
REG03 (address = 03) [reset = 001 0001 0]
9.7.5
REG04 (address = 04) [reset = 01011000]
9.7.6
REG05 (address = 05) [reset = 10011111]
9.7.7
REG06 (address = 06) [reset = 01100110]
9.7.8
REG07 (address = 07) [reset = 01001100]
9.7.9
REG08 (address = 08) [reset = xxxxxxxx]
9.7.10
REG09 (address = 09) [reset = xxxxxxxx]
9.7.11
REG0A (address = 0A) [reset = xxxxxx00]
9.7.12
REG0B (address = 0B) [reset = 00111xxx]
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
Third-Party Products Disclaimer
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Receiving Notification of Documentation Updates
11.4
Support Resources
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
Package Options
Mechanical Data (Package|Pins)
RTW|24
MPQF167C
Thermal pad, mechanical data (Package|Pins)
RTW|24
QFND125K
Orderable Information
slusda2b_oa
slusda2b_pm
10.2
Layout Example
Figure 10-1
High Frequency Current Path
Figure 10-2
Layout Example