SLUSCK6C May   2017  – September 2021 BQ25606

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Device Power Up from Battery without Input Source
      2. 9.3.2 Power Up from Input Source
        1. 9.3.2.1 Power Up REGN Regulation
        2. 9.3.2.2 Poor Source Qualification
        3. 9.3.2.3 Input Source Type Detection
          1. 9.3.2.3.1 D+/D– Detection Sets Input Current Limit in BQ25606
        4. 9.3.2.4 Input Voltage Limit Threshold Setting (VINDPM Threshold)
        5. 9.3.2.5 Converter Power Up
      3. 9.3.3 Boost Mode Operation From Battery
      4. 9.3.4 Power Path Management
        1. 9.3.4.1 Narrow VDC Architecture
        2. 9.3.4.2 Dynamic Power Management
        3. 9.3.4.3 Supplement Mode
      5. 9.3.5 Battery Charging Management
        1. 9.3.5.1 Autonomous Charging Cycle
        2. 9.3.5.2 Charging Termination
        3. 9.3.5.3 Thermistor Qualification
        4. 9.3.5.4 JEITA Guideline Compliance During Charging Mode
        5. 9.3.5.5 Boost Mode Thermistor Monitor during Battery Discharge Mode
        6. 9.3.5.6 Charging Safety Timer
      6. 9.3.6 Status Outputs ( PG, STAT)
        1. 9.3.6.1 Power Good Indicator (PG Pin)
        2. 9.3.6.2 Charging Status Indicator (STAT)
      7. 9.3.7 Protections
        1. 9.3.7.1 Input Current Limit
        2. 9.3.7.2 Voltage and Current Monitoring in Converter Operation
          1. 9.3.7.2.1 Voltage and Current Monitoring in Buck Mode
            1. 9.3.7.2.1.1 Input Overvoltage (ACOV)
            2. 9.3.7.2.1.2 System Overvoltage Protection (SYSOVP)
        3. 9.3.7.3 Voltage and Current Monitoring in Boost Mode
          1. 9.3.7.3.1 VBUS Soft Start
          2. 9.3.7.3.2 VBUS Output Protection
          3. 9.3.7.3.3 Boost Mode Overvoltage Protection
        4. 9.3.7.4 Thermal Regulation and Thermal Shutdown
          1. 9.3.7.4.1 Thermal Protection in Buck Mode
          2. 9.3.7.4.2 Thermal Protection in Boost Mode
        5. 9.3.7.5 Battery Protection
          1. 9.3.7.5.1 Battery Overvoltage Protection (BATOVP)
          2. 9.3.7.5.2 Battery Overdischarge Protection
          3. 9.3.7.5.3 System Overcurrent Protection
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Inductor Selection
        2. 10.2.2.2 Input Capacitor
        3. 10.2.2.3 Output Capacitor
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.5 Electrical Characteristics

VVAC_PRESENT < VVAC < VVAC_OV and VVAC > VBAT + VSLEEP, TJ = –40°C to 125°C and TJ = 25°C for typical values (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
QUIESCENT CURRENTS
IBATBattery discharge current (BAT, SW, SYS) in buck modeVBAT = 4.5 V, VBUS < VAC-UVLOZ, leakage between BAT and VBUS, TJ< 85°C5µA
IBATBattery discharge current (BAT, SW, SYS)VBAT = 4.5 V, No VBUS, TJ < 85°C5885µA
IVBUSInput supply current (VBUS) in buck modeVVBUS = 12 V, VVBUS > VVBAT, converter not switching1.53mA
IVBUSInput supply current (VBUS) in buck modeVVBUS > VUVLO, VVBUS > VVBAT, converter switching, VBAT = 3.8V, ISYS = 0A3mA
IBOOSTBattery discharge current in boost modeVBAT = 4.2 V, boost mode, IVBUS = 0 A, converter switching3mA
VBUS, VAC AND BAT PIN POWER UP
VBUS_OPVBUS operating rangeVVBUS rising3.913.5V
VVAC_PRESENTREGN turn-on thresholdVVAC rising3.363.653.97V
VVAC_PRESENT_HYSVVAC falling300mV
VSLEEPSleep mode falling threshold(VVAC–VVBAT ), VBUSMIN_FALL ≤ VBAT ≤ VREG, VAC falling3776126mV
VSLEEPZSleep mode rising threshold(VVAC–VVBAT ), VBUSMIN_FALL ≤ VBAT ≤ VREG, VAC rising130220350mV
VVAC_OV_RISEVAC Overvoltage rising thresholdVAC rising13.514.2814.91V
VVAC_OV_HYSVAC Overvoltage hysteresisVAC falling520mV
VBAT_DPL_FALLBattery depletion falling threshold (Q4 turn-off threshold)VBAT falling2.152.6V
VBAT_DPL_RISEBattery Depletion rising threshold (Q4 turn-on threshold)VBAT rising2.352.82V
VBAT_DPL_HYSTBattery Depletion rising hysteresisVBAT rising180mV
VBUSMIN_FALLBad adapter detection falling thresholdVBUS falling3.653.83.93V
VBUSMIN_HYSTBad adapter detection hysteresis200mV
IBADSRCBad adapter detection current sourceSink current from VBUS to GND30mA
POWER PATH
VSYS_MINSystem regulation voltageVVBAT < VSYS_MIN = 3.5V, charge enabled or disabled3.53.68V
VSYSSystem regulation voltageISYS = 0 A, VVBAT > VSYSMIN, charge disabledVBAT + 50 mVV
RON(RBFET)Top reverse blocking MOSFET on-resistance between VBUS and PMID - Q1-40°C≤ TA ≤ 125°C45mΩ
RON(HSFET)Top switching MOSFET on-resistance between PMID and SW - Q2VREGN = 5 V , -40°C≤ TA ≤ 125°C62mΩ
RON(LSFET)Bottom switching MOSFET on-resistance between SW and GND - Q3VREGN = 5 V , -40°C≤ TA ≤ 125°C70mΩ
VFWDBATFET forward voltage in supplement mode30mV
RON(BAT-SYS)SYS-BAT MOSFET on-resistanceQFN package, Measured from BAT to SYS, VBAT = 4.2V, TJ = 25°C19.524mΩ
RON(BAT-SYS)SYS-BAT MOSFET on-resistanceQFN package, Measured from BAT to SYS, VBAT = 4.2V, TJ = –40 - 125°C19.530mΩ
BATTERY CHARGER
VBATREGCharge voltageRVSET > 50 kΩ, –40 ≤ TJ ≤ 85°C4.1874.2084.229V
RVSET < 500 Ω, –40 ≤ TJ ≤ 85°C4.3304.3524.374V
RVSET = 10 kΩ, –40 ≤ TJ ≤ 85°C4.3784.44.422V
VBATREG_ACCCharge voltage setting accuracyVBAT = 4.208 V or VBAT = 4.352 V, –40 ≤ TJ ≤ 85°C–0.5%0.5%
ICHG_REG_RANGECharge current regulation range03000mA
ICHG_REGCharge current regulationRICHG = 1100 Ω, VVBAT = 3.1 V or VVBAT = 3.8 V516615715mA
ICHG_REG_ACCCharge current regulation accuracyRICHG = 1100 Ω, VVBAT = 3.1 V or VVBAT = 3.8 V-16%16%
ICHG_REGCharge current regulationRICHG = 562 Ω, VVBAT = 3.1 V or VVBAT = 3.8 V1.141.2181.28A
ICHG_REGCharge current regulation accuracyRICHG = 562 Ω, VBAT = 3.1 V or VBAT = 3.8 V-6%6%
ICHG_REGCharge current regulationRICHG = 372 Ω, VVBAT = 3.1 V or VVBAT = 3.8 V1.7151.8131.89A
ICHG_REG_ACCCharge current regulation accuracyRICHG = 372 Ω, VVBAT = 3.1 V or VVBAT = 3.8 V-5%5%
KICHGCharge current regulation setting ratioRICHG = 372 Ω, 562 Ω VVBAT = 3.1 V or VVBAT = 3.8 V639677715A×Ω
KICHG_ACCCharge current regulation setting ratio accuracyRICHG = 372Ω, 562 Ω VVBAT = 3.1 V or VVBAT = 3.8 V-6%6%
VBATLOWV_FALLBattery LOWV falling thresholdFast charge to precharge2.672.82.87V
VBATLOWV_RISEBattery LOWV rising thresholdPre-charge to fast charge3.03.13.24V
IPRECHGPrecharge current regulationRICHG = 1100 Ω, VVBAT = 2.6 V, IPRECHG = 5% of ICHG = 615mA2138mA
IPRECHG_ACCPrecharge current regulation accuracyPercentage of ICHG,RICHG = 1100 Ω, VVBAT = 2.6 V, ICHG = 615mA3.4%6.2%
IPRECHGPrecharge current regulationRICHG = 562 Ω, VVBAT = 2.6 V, IPRECHG = 5% of ICHG = 1.218A4867mA
IPRECHG_ACCPrecharge current regulation accuracyPercentage of ICHG,RICHG = 562 Ω, V1330 = 2.6 V, ICHG = 1.218A3.9%5.5%
IPRECHGPrecharge current regulationRICHG = 372 Ω, VVBAT = 2.6 V, IPRECHG = 5% of ICHG = 1.813A7697mA
IPRECHG_ACCPrecharge current regulation accuracyPercentage of ICHG,RICHG = 372 Ω, VVBAT = 2.6 V, ICHG = 1.813A4.1%5.4%
ITERMTermination current regulationRICHG = 562 Ω, VVBAT = 4.35V,CHG = 1.218A26100mA
ITERM_ACCTermination current regulation accuracyPercentage of ICHG, RICHG = 562 Ω, VVBAT = 4.35 V, ICHG = 1.218 A2.1%8.3%
ITERMTermination current regulationRICHG = 372 Ω, VVBAT = 4.35 V, ICHG = 1.813 A56100126mA
ITERM_ACCTermination current regulation accuracyPercentage of ICHG, RICHG = 372 Ω, VVBAT = 4.35 V, ICHG = 1.813 A3.0%7.0%
VSHORTBattery short voltageVVBAT falling1.8522.15V
VSHORTZBattery short voltageVVBAT rising2.052.252.35V
ISHORTBattery short currentVVBAT < VSHORTZ7090110mA
VRECHGRecharge Threshold below VBAT_REGVBAT falling87121156mV
ISYSLOADSystem discharge load currentVSYS = 4.2 V30mA
INPUT VOLTAGE AND CURRENT REGULATION
VDPM_VBATInput voltage regulation limitVVBAT < 4.1 V (VVBAT= 3.6 V)4.1714.34.429V
VDPM_VBAT_ACCInput voltage regulation accuracyVVBAT < 4.1 V (VVBAT = 3.6 V)–3%3%
IINDPMUSB input current regulation limitVVBUS = 5 V, USB500 charge port detected by DPDM , –40 ≤ TJ ≤ 85°C448500mA
IINDPMInput current regulation limitRILIM = 910 Ω, unknown adaptor detected by DPDM , –40 ≤ TJ ≤ 85°C505526550mA
IINDPMInput current regulation limit accuracyRILIM = 374 Ω, unknown adaptor detected by DPDM , –40 ≤ TJ ≤ 85°C122012761330mA
IINDPMInput current regulation limitRILIM = 265 Ω, unknown adaptor detected by DPDM , –40 ≤ TJ ≤ 85°C1.731.81.871A
IINDPM_ACCInput current regulation limit accuracyRILIM = 265 Ω, 374 Ω, 910 Ω, unknown adaptor detected by DPDM , –40 ≤ TJ ≤ 85°C–5%5%
KILIMInput current setting ratio, ILIM = KILIM / RILIMRILIM = 910 Ω, 374 Ω, 265 Ω, unknown adaptor detected by DPDM, –40 ≤ TJ ≤ 85°C459478500A×Ω
KILIM_ACCInput current setting ratio, ILIM = KILIM / RILIMRILIM = 910 Ω, 374 Ω, 265 Ω, unknown adaptor detected by DPDM, –40 ≤ TJ ≤ 85°C–5%5%
IIN_STARTInput current limit during system start-up sequence200mA
BAT PIN OVERVOLTAGE PROTECTION
VBATOVP_RISEBattery overvoltage thresholdVBAT rising, as percentage of VBAT_REG103%104%105%
VBATOVP_FALLBattery overvoltage thresholdVBAT falling, as percentage of VBAT_REG101%102%103%
THERMAL REGULATION AND THERMAL SHUTDOWN
TJUNCTION_REGJunction Temperature Regulation Threshold110°C
TSHUTThermal Shutdown Rising TemperatureTemperature Increasing160°C
TSHUT_HYSTThermal Shutdown Hysteresis30°C
JEITA THERMISTOR COMPARATOR (BUCK MODE)
VT1T1 (0°C) threshold, Charge suspended T1 below this temperature.Charger suspends charge. As Percentage to VREGN72.4%73.3%74.2%
VT1FallingAs Percentage to VREGN69%71.5%74%
VT2T2 (10°C) threshold, Charge back to ICHG/2 and 4.2 V below this temperatureAs percentage of VREGN67.2%68%69%
VT2FallingAs Percentage to VREGN66%66.8%67.7%
VT3T3 (45°C) threshold, charge back to ICHG and 4.05V above this temperature.Charger suspends charge. As Percentage to VREGN43.8%44.7%45.8%
VT3FallingAs Percentage to VREGN45.1%45.7%46.2%
VT5T5 (60°C) threshold, charge suspended above this temperature.As Percentage to VREGN33.7%34.2%35.1%
VT5FallingAs Percentage to VREGN34.5%35.3%36.2%
COLD OR HOT THERMISTER COMPARATOR (BOOST MODE)
VBCOLDCold Temperature Threshold, TS pin Voltage Rising ThresholdAs Percentage to VREGN  (Approx. –20°C w/ 103AT), –20°C ≤ TJ≤ 125°C79.5%80%80.5%
VBCOLDFalling–20°C ≤ TJ≤ 125°C78.5%79%79.5%
VBHOTHot Temperature Threshold, TS pin Voltage falling ThresholdAs Percentage to VREGN (Approx. 60°C w/ 103AT), –20°C ≤ TJ≤ 125°C30.2%31.2%32.2%
VBHOTRising–20°C ≤ TJ≤ 125°C33.8%34.4%34.9%
CHARGE OVERCURRENT COMPARATOR (CYCLE-BY-CYCLE)
IHSFET_OCPHSFET cycle-by-cycle over-current threshold5.28.0A
IBATFET_OCPSystem over load threshold6.0A
PWM
fSWPWM switching frequencyOscillator frequency, buck mode132015001680kHz
Oscillator frequency, boost mode117014121500kHz
DMAXMaximum PWM duty cycle(1)97%
BOOST MODE OPERATION
VOTG_REGBoost mode regulation voltageVVBAT = 3.8 V, I(PMID) = 0 A4.9725.1265.280V
VOTG_REG_ACCBoost mode regulation voltage accuracyVVBAT = 3.8 V, I(PMID) = 0 A-33%
VBATLOWV_OTGBattery voltage exiting boost modeVVBAT falling2.62.82.9V
Battery voltage entering boost modeVVBAT rising2.93.03.15V
IOTGOTG mode output current limit1.21.41.6A
VOTG_OVPOTG overvoltage thresholdRising threshold5.555.86.15V
REGN LDO
VREGNREGN LDO output voltageVVBUS = 9 V, IREGN = 40 mA5.666.65V
VREGNREGN LDO output voltageVVBUS = 5 V, IREGN = 20 mA4.64.74.9V
LOGIC I/O PIN CHARACTERISTICS (CE, PSEL, SCL, SDA, INT)
VILOInput low threshold CE0.4V
VIHInput high threshold CE1.3V
IBIASHigh-level leakage current CEPull up rail 1.8 V1µA
VILOInput low threshold OTG0.4V
VIHInput high threshold OTG1.3V
IBIASHigh-level leakage current OTGPull up rail 1.8 V1µA
LOGIC I/O PIN CHARACTERISTICS (PG, STAT)
VOLLow-level output voltage0.4V
D+/D– DETECTION
VD+_1P2D+ Threshold for  Non-standard adapter (combined V1P2_VTH_LO and V1P2_VTH_HI)1.051.35V
ID+_LKGLeakage current into D+HiZ-11µA
VD–_600MVSRCVoltage source (600 mV)500600700mV
ID–_100UAISNKD– current sink (100 µA)VD– = 500 mV,50100150µA
RD–_19KD– resistor to ground (19 kΩ)VD– = 500 mV,14.2524.8kΩ
VD–_0P325D– comparator threshold for primary detectionD– pin Rising250400mV
VD–_2P8D– Threshold for  non-standard adapter (combined V2P8_VTH_LO and V2P8_VTH_HI)2.552.85V
VD–_2P0D– Comparator threshold for  non-standard adapter (For non-standard – same as BQ2589x)1.852.15V
VD–_1P2D– Threshold for  non-standard adapter (combined V1P2_VTH_LO and V1P2_VTH_HI)1.051.35V
ID–_LKGLeakage current into D–HiZ-11µA
(1) Specified by design. Not production tested.