SLUSEB9B
december 2020 ā july 2023
BQ25672
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Device Power-On-Reset
8.3.2
PROG Pin Configuration
8.3.3
Device Power Up from Battery without Input Source
8.3.4
Device Power Up from Input Source
8.3.4.1
Power Up REGN LDO
8.3.4.2
Poor Source Qualification
8.3.4.3
ILIM_HIZ Pin
8.3.4.4
Default VINDPM Setting
8.3.4.5
Input Source Type Detection
8.3.4.5.1
D+/Dā Detection Sets Input Current Limit
8.3.4.5.2
HVDCP Detection Procedure
8.3.4.5.3
Connector Fault Detection
8.3.5
Dual-Input Power Mux
8.3.5.1
VBUS Input Only
8.3.5.2
One ACFET-RBFET
8.3.5.3
Two ACFETs-RBFETs
8.3.6
Buck Converter Operation
8.3.6.1
Force Input Current Limit Detection
8.3.6.2
Input Current Optimizer (ICO)
8.3.6.3
Maximum Power Point Tracking for Small PV Panel
8.3.6.4
Pulse Frequency Modulation (PFM)
8.3.6.5
Device HIZ State
8.3.7
USB On-The-Go (OTG)
8.3.7.1
OTG Mode to Power External Devices
8.3.8
Power Path Management
8.3.8.1
Narrow Voltage DC Architecture
8.3.8.2
Dynamic Power Management
8.3.9
Battery Charging Management
8.3.9.1
Autonomous Charging Cycle
8.3.9.2
Battery Charging Profile
8.3.9.3
Charging Termination
8.3.9.4
Charging Safety Timer
8.3.9.5
Thermistor Qualification
8.3.9.5.1
JEITA Guideline Compliance in Charge Mode
8.3.9.5.2
Cold/Hot Temperature Window in OTG Mode
8.3.10
Integrated 16-Bit ADC for Monitoring
8.3.11
Status Outputs ( STAT, and INT)
8.3.11.1
Charging Status Indicator (STAT Pin)
8.3.11.2
Interrupt to Host ( INT)
8.3.12
Ship FET Control
8.3.12.1
Shutdown Mode
8.3.12.2
Ship Mode
8.3.12.3
System Power Reset
8.3.13
Protections
8.3.13.1
Voltage and Current Monitoring
8.3.13.1.1
VAC Over-voltage Protection (VAC_OVP)
8.3.13.1.2
VBUS Over-voltage Protection (VBUS_OVP)
8.3.13.1.3
VBUS Under-voltage Protection (POORSRC)
8.3.13.1.4
System Over-voltage Protection (VSYS_OVP)
8.3.13.1.5
System Short Protection (VSYS_SHORT)
8.3.13.1.6
Battery Over-voltage Protection (VBAT_OVP)
8.3.13.1.7
Battery Over-current Protection (IBAT_OCP)
8.3.13.1.8
Input Over-current Protection (IBUS_OCP)
8.3.13.1.9
OTG Over-voltage Protection (OTG_OVP)
8.3.13.1.10
OTG Under-voltage Protection (OTG_UVP)
8.3.13.2
Thermal Regulation and Thermal Shutdown
8.3.14
Serial Interface
8.3.14.1
Data Validity
8.3.14.2
START and STOP Conditions
8.3.14.3
Byte Format
8.3.14.4
Acknowledge (ACK) and Not Acknowledge (NACK)
8.3.14.5
Target Address and Data Direction Bit
8.3.14.6
Single Write and Read
8.3.14.7
Multi-Write and Multi-Read
8.4
Device Functional Modes
8.4.1
Host Mode and Default Mode
8.4.2
Register Bit Reset
8.5
Register Map
8.5.1
I2C Registers
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Inductor Selection
9.2.2.2
Input (VBUS / PMID) Capacitor
9.2.2.3
Output (VSYS) Capacitor
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Third-Party Products Disclaimer
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Receiving Notification of Documentation Updates
12.4
Support Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RQM|29
MPQF573
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sluseb9b_oa
sluseb9b_pm
Data Sheet
BQ25672 I
2
C Controlled, 1- to 4-Cell, 3-A Buck Battery Charger with Dual-Input Selector, MPPT for Solar Panels and Integrated ADC