Menu
Product
Email
PDF
Order now
BQ25730 I2C 1- to 5-Cell Buck-Boost Narrow VDC Battery Charge Controller with Power Path Control and USB-C PD 3.0 OTG Output
SLUSE65A
February 2021 – January 2024
BQ25730
PRODUCTION DATA
CONTENTS
SEARCH
BQ25730 I2C 1- to 5-Cell Buck-Boost Narrow VDC Battery Charge Controller with Power Path Control and USB-C PD 3.0 OTG Output
1
1
Features
2
Applications
3
Description
4
Description (continued)
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics(BQ25730)
7.6
Timing Requirements
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Power-Up Sequence
8.3.2
Two-Level Battery Discharge Current Limit
8.3.3
Fast Role Swap Feature
8.3.4
CHRG_OK Indicator
8.3.5
Input and Charge Current Sensing
8.3.6
Input Voltage and Current Limit Setup
8.3.7
Battery Cell Configuration
8.3.8
Device HIZ State
8.3.9
USB On-The-Go (OTG)
8.3.10
Converter Operation
8.3.11
Inductance Detection Through IADPT Pin
8.3.12
Converter Compensation
8.3.13
Continuous Conduction Mode (CCM)
8.3.14
Pulse Frequency Modulation (PFM)
8.3.15
Switching Frequency and Dithering Feature
8.3.16
Current and Power Monitor
8.3.16.1
High-Accuracy Current Sense Amplifier (IADPT and IBAT)
8.3.16.2
High-Accuracy Power Sense Amplifier (PSYS)
8.3.17
Input Source Dynamic Power Management
8.3.18
Input Current Optimizer (ICO)
8.3.19
Two-Level Adapter Current Limit (Peak Power Mode)
8.3.20
Processor Hot Indication
8.3.20.1
PROCHOT During Low Power Mode
8.3.20.2
PROCHOT Status
8.3.21
Device Protection
8.3.21.1
Watchdog Timer
8.3.21.2
Input Overvoltage Protection (ACOV)
8.3.21.3
Input Overcurrent Protection (ACOC)
8.3.21.4
System Overvoltage Protection (SYSOVP)
8.3.21.5
Battery Overvoltage Protection (BATOVP)
8.3.21.6
Battery Discharge Overcurrent Protection (BATOC)
8.3.21.7
Battery Short Protection (BATSP)
8.3.21.8
System Undervoltage Lockout (VSYS_UVP) and Hiccup Mode
8.3.21.9
Thermal Shutdown (TSHUT)
8.4
Device Functional Modes
8.4.1
Forward Mode
8.4.1.1
System Voltage Regulation with Narrow VDC Architecture
8.4.1.2
Battery Charging
8.4.2
USB On-The-Go
8.4.3
Pass Through Mode (PTM)-Patented Technology
8.5
Programming
8.5.1
I2C Serial Interface
8.5.1.1
Timing Diagrams
8.5.1.2
Data Validity
8.5.1.3
START and STOP Conditions
8.5.1.4
Byte Format
8.5.1.5
Acknowledge (ACK) and Not Acknowledge (NACK)
8.5.1.6
Target Address and Data Direction Bit
8.5.1.7
Single Read and Write
8.5.1.8
Multi-Read and Multi-Write
8.5.1.9
Write 2-Byte I2C Commands
8.6
Register Map
8.6.1
ChargeOption0 Register (I2C address = 01/00h) [reset = E70Eh]
8.6.2
ChargeCurrent Register (I2C address = 03/02h) [reset = 0000h]
8.6.2.1
Battery Pre-Charge Current Clamp
8.6.3
ChargeVoltage Register (I2C address = 05/04h) [reset value based on CELL_BATPRESZ pin setting]
8.6.4
ChargerStatus Register (I2C address = 21/20h) [reset = 0000h]
8.6.5
ProchotStatus Register (I2C address = 23/22h) [reset = B800h]
8.6.6
IIN_DPM Register (I2C address = 25/24h) [reset = 4100h]
8.6.7
ADCVBUS/PSYS Register (I2C address = 27/26h)
8.6.8
ADCIBAT Register (I2C address = 29/28h)
8.6.9
ADCIIN/CMPIN Register (I2C address = 2B/2Ah)
8.6.10
ADCVSYS/VBAT Register (I2C address = 2D/2Ch)
8.6.11
ChargeOption1 Register (I2C address = 31/30h) [reset = 3F00h]
8.6.12
ChargeOption2 Register (I2C address = 33/32h) [reset = 00B7]
8.6.13
ChargeOption3 Register (I2C address = 35/34h) [reset = 0434h]
8.6.14
ProchotOption0 Register (I2C address = 37/36h) [reset = 4A81h(2S~5s) 4A09(1S)]
8.6.15
ProchotOption1 Register (I2C address = 39/38h) [reset = 41A0h]
8.6.16
ADCOption Register (I2C address = 3B/3Ah) [reset = 2000h]
8.6.17
ChargeOption4 Register (I2C address = 3D/3Ch) [reset = 0048h]
8.6.18
Vmin Active Protection Register (I2C address = 3F/3Eh) [reset = 006Ch(2s~5s)/0004h(1S)]
8.6.19
OTGVoltage Register (I2C address = 07/06h) [reset = 09C4h]
8.6.20
OTGCurrent Register (I2C address = 09/08h) [reset = 3C00h]
8.6.21
InputVoltage(VINDPM) Register (I2C address = 0B/0Ah) [reset =VBUS-1.28V]
8.6.22
VSYS_MIN Register (I2C address = 0D/0Ch) [reset value based on CELL_BATPRESZ pin setting]
8.6.23
IIN_HOST Register (I2C address = 0F/0Eh) [reset = 2000h]
8.6.24
ID Registers
8.6.24.1
ManufactureID Register (I2C address = 2Eh) [reset = 40h]
8.6.24.2
Device ID (DeviceAddress) Register (I2C address = 2Fh) [reset = D5h]
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Input Snubber and Filter for Voltage Spike Damping
9.2.2.2
ACP-ACN Input Filter
9.2.2.3
Inductor Selection
9.2.2.4
Input Capacitor
9.2.2.5
Output Capacitor
9.2.2.6
Power MOSFETs Selection
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
11.2.1
Layout Example Reference Top View
11.2.2
Inner Layer Layout and Routing Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Third-Party Products Disclaimer
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Receiving Notification of Documentation Updates
12.4
Support Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Revision History
14
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
RSN|32
MPQF194B
Thermal pad, mechanical data (Package|Pins)
RSN|32
QFND189E
Orderable Information
sluse65a_oa
sluse65a_pm
search
No matches found.
Full reading width
Full reading width
Comfortable reading width
Expanded reading width
Card for each section
Card with all content
Data Sheet
BQ25730 I
2
C 1- to 5-Cell Buck-Boost Narrow VDC Battery Charge Controller with Power Path Control and USB-C PD 3.0 OTG Output
1
Features
Power path control through battery MOSFET implementing independent system voltage instant-on with no battery or depleted battery
400kHz/800kHz programmable switching frequency for high efficiency/high power density
Buck-boost
narrow voltage DC (NVDC)
charger for USB-C Power Delivery (PD) interface platform
3.5V to
26V
input range to charge 1- to
5-cell
battery
Charge current up to 16.2A/8.1A with 128mA/64mA resolution based on 5mΩ/10mΩ sensing resistor
Input current limit up to 10A/6.35A with 100mA/50mA resolution based on 5mΩ/10mΩ sensing resistor
Support USB 2.0, USB 3.0, USB 3.1 and USB Power Delivery (PD)
Input Current Optimizer (ICO) to extract max input power without overloading the adapter
Seamless transition between buck, buck-boost, and boost operations
Input current and voltage regulation (IINDPM and VINDPM) against source overload
TI patented switching frequency dithering pattern for EMI noise reduction
TI patented Pass Through Mode (PTM) for system power efficiency improvement and battery fast charging achieving 99% efficiency.
Input and battery current monitor through dedicated pins
Integrated 8-bit ADC to monitor voltage, current and power
Battery MOSFET ideal diode operation in supplement mode to support system when adapter is fully loaded
Power up USB port from battery (USB OTG)
3V to 24V OTG with 8mV resolution
Output current limit up to 12.7A/6.35A with 100mA/50mA resolution based on 5mΩ/10mΩ sensing resistor
I
2
C
host control interface for flexible system configuration
High accuracy for the regulation and monitor
±0.5% Charge voltage regulation
±3% Charge current regulation
±2.5% Input current regulation
±2% Input/charge current monitor
Safety
Thermal shutdown
Input, system, battery overvoltage protection
Input, MOSFET, inductor overcurrent protection
Safety-Related Certifications
IEC 62368-1 CB Certification
Package: 32-Pin 4.0mm × 4.0mm WQFN