SLUSDY3
December 2023
BQ25750
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Description (continued)
5
Device Comparison
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Typical Characteristics (BQ25750)
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Device Power-On-Reset
8.3.2
Device Power-Up From Battery Without Input Source
8.3.3
Device Power Up from Input Source
8.3.3.1
VAC Operating Window Programming (ACUV and ACOV)
8.3.3.2
REGN Regulator (REGN LDO)
8.3.3.3
Compensation-Free Buck-Boost Converter Operation
8.3.3.3.1
Light-Load Operation
8.3.3.4
Switching Frequency and Synchronization (FSW_SYNC)
8.3.3.5
Device HIZ Mode
8.3.4
Battery Charging Management
8.3.4.1
Autonomous Charging Cycle
8.3.4.1.1
Charge Current Programming (ICHG pin and ICHG_REG)
8.3.4.2
Li-Ion Battery Charging Profile
8.3.4.3
LiFePO4 Battery Charging Profile
8.3.4.4
Charging Termination for Li-ion and LiFePO4
8.3.4.5
Charging Safety Timer
8.3.4.6
Thermistor Qualification
8.3.4.6.1
JEITA Guideline Compliance in Charge Mode
8.3.4.6.2
Cold/Hot Temperature Window in Reverse Mode
8.3.5
Power Path Management
8.3.5.1
Dynamic Power Management: Input Voltage and Input Current Regulation
8.3.5.1.1
Input Current Regulation
8.3.5.1.1.1
ILIM_HIZ Pin
8.3.5.1.2
Input Voltage Regulation
8.3.5.1.2.1
Max Power Point Tracking (MPPT) for Solar PV Panel
8.3.6
Reverse Mode Power Direction
8.3.6.1
Auto Reverse Mode
8.3.7
Integrated 16-Bit ADC for Monitoring
8.3.8
Status Outputs (PG, STAT1, STAT2, and INT)
8.3.8.1
Power Good Indicator (PG)
8.3.8.2
Charging Status Indicator (STAT1, STAT2 Pins)
8.3.8.3
Interrupt to Host (INT)
8.3.9
Serial Interface
8.3.9.1
Data Validity
8.3.9.2
START and STOP Conditions
8.3.9.3
Byte Format
8.3.9.4
Acknowledge (ACK) and Not Acknowledge (NACK)
8.3.9.5
Target Address and Data Direction Bit
8.3.9.6
Single Write and Read
8.3.9.7
Multi-Write and Multi-Read
8.4
Device Functional Modes
8.4.1
Host Mode and Default Mode
8.4.2
Register Bit Reset
8.5
BQ25750 Registers
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Typical Application
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.2.1
ACUV / ACOV Input Voltage Operating Window Programming
9.2.1.2.2
Charge Voltage Selection
9.2.1.2.3
Switching Frequency Selection
9.2.1.2.4
Inductor Selection
9.2.1.2.5
Input (VAC / SYS) Capacitor
9.2.1.2.6
Output (VBAT) Capacitor
9.2.1.2.7
Sense Resistor (RAC_SNS and RBAT_SNS) and Current Programming
9.2.1.2.8
Power MOSFETs Selection
9.2.1.2.9
ACFETs and BATFETs Selection
9.2.1.2.10
Converter Fast Transient Response
9.2.1.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Third-Party Products Disclaimer
12.2
Receiving Notification of Documentation Updates
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Revision History
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RRV|36
MPQF623A
Thermal pad, mechanical data (Package|Pins)
RRV|36
QFND780
Orderable Information
slusdy3_oa
slusdy3_pm
9.2.1.2
Detailed Design Procedure